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* Remove opl_sample_rate variable since it has no practical effect * Deactivate idle OPL chips Allocate free OPL voices from active chips before inactive ones * Add comments for new constants * Ensure OPL chip LFOs are kept in sync after dormancy * Check for chip activations before sample generation to preserve sync
433 lines
12 KiB
C
433 lines
12 KiB
C
//
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// Copyright(C) 2005-2014 Simon Howard
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//
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// This program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public License
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// as published by the Free Software Foundation; either version 2
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// of the License, or (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// DESCRIPTION:
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// OPL SDL interface.
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//
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#include <stdlib.h>
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#include "doomtype.h"
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#include "opl.h"
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#include "opl3.h"
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#include "opl_internal.h"
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#include "opl_queue.h"
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#define MAX_SOUND_SLICE_TIME 100 /* ms */
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#define OPL_SILENCE_THRESHOLD 36 // Allow for a worst case of +/-1 ripple in all 36 operators.
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#define OPL_CHIP_TIMEOUT (OPL_SAMPLE_RATE / 2) // 0.5 seconds of silence with no key-on
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// should be enough to ensure chip is "off"
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typedef struct
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{
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unsigned int rate; // Number of times the timer is advanced per sec.
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unsigned int enabled; // Non-zero if timer is enabled.
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unsigned int value; // Last value that was set.
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uint64_t expire_time; // Calculated time that timer will expire.
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} opl_timer_t;
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// Queue of callbacks waiting to be invoked.
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static opl_callback_queue_t *callback_queue;
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// Current time, in us since startup:
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static uint64_t current_time;
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// If non-zero, playback is currently paused.
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static int opl_sdl_paused;
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// Time offset (in us) due to the fact that callbacks
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// were previously paused.
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static uint64_t pause_offset;
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// OPL software emulator structure.
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static opl3_chip opl_chips[OPL_MAX_CHIPS];
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static uint32_t opl_chip_keys[OPL_MAX_CHIPS];
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static uint32_t opl_chip_timeouts[OPL_MAX_CHIPS];
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static int opl_opl3mode;
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// Register number that was written.
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static int register_num = 0;
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// Timers; DBOPL does not do timer stuff itself.
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static opl_timer_t timer1 = { 12500, 0, 0, 0 };
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static opl_timer_t timer2 = { 3125, 0, 0, 0 };
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static int mixing_channels;
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// Advance time by the specified number of samples, invoking any
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// callback functions as appropriate.
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static void AdvanceTime(unsigned int nsamples)
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{
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opl_callback_t callback;
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void *callback_data;
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uint64_t us;
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// Advance time.
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us = ((uint64_t) nsamples * OPL_SECOND) / OPL_SAMPLE_RATE;
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current_time += us;
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if (opl_sdl_paused)
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{
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pause_offset += us;
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}
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// Are there callbacks to invoke now? Keep invoking them
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// until there are no more left.
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while (!OPL_Queue_IsEmpty(callback_queue)
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&& current_time >= OPL_Queue_Peek(callback_queue) + pause_offset)
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{
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// Pop the callback from the queue to invoke it.
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if (!OPL_Queue_Pop(callback_queue, &callback, &callback_data))
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{
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break;
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}
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callback(callback_data);
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}
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}
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// When a chip is re-activated after being idle, we need to bring its
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// internal global timers back into synch with the main chip to avoid
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// possible beating artifacts
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static void ResyncChip (int chip)
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{
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// Find an active chip to synchronize with; will usually be chip 0
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int sync = -1;
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for (int c = 0; c < OPL_MAX_CHIPS; ++c)
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{
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if (opl_chip_timeouts[c] < OPL_CHIP_TIMEOUT)
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{
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sync = c;
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break;
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}
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}
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if (sync >= 0)
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{
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// Synchronize the LFOs
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opl_chips[chip].vibpos = opl_chips[sync].vibpos;
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opl_chips[chip].tremolopos = opl_chips[sync].tremolopos;
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opl_chips[chip].timer = opl_chips[sync].timer;
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// Synchronize the envelope clock
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opl_chips[chip].eg_state = opl_chips[sync].eg_state;
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opl_chips[chip].eg_timer = opl_chips[sync].eg_timer;
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opl_chips[chip].eg_timerrem = opl_chips[sync].eg_timerrem;
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}
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}
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// Callback function to fill a new sound buffer:
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int OPL_FillBuffer(byte *buffer, int buffer_samples)
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{
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unsigned int filled;
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// Repeatedly call the OPL emulator update function until the buffer is
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// full.
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filled = 0;
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while (filled < buffer_samples)
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{
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uint64_t next_callback_time;
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uint64_t nsamples;
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// Work out the time until the next callback waiting in
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// the callback queue must be invoked. We can then fill the
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// buffer with this many samples.
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if (opl_sdl_paused || OPL_Queue_IsEmpty(callback_queue))
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{
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nsamples = buffer_samples - filled;
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}
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else
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{
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next_callback_time = OPL_Queue_Peek(callback_queue) + pause_offset;
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nsamples = (next_callback_time - current_time) * OPL_SAMPLE_RATE;
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nsamples = (nsamples + OPL_SECOND - 1) / OPL_SECOND;
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if (nsamples > buffer_samples - filled)
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{
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nsamples = buffer_samples - filled;
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}
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}
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// Add emulator output to buffer.
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Bit16s *cursor = (Bit16s *)(buffer + filled * 4);
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for (int s = 0; s < nsamples; ++s)
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{
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// Check for chip activations before we generate the sample
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for (int c = 0; c < num_opl_chips; ++c)
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{
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// Reset chip timeout if any channels are active
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if (opl_chip_keys[c])
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{
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// Resync is necessary if the chip was idle
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if (opl_chip_timeouts[c] >= OPL_CHIP_TIMEOUT)
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ResyncChip(c);
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opl_chip_timeouts[c] = 0;
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}
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}
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// Generate a sample from each chip and mix them
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Bit32s mix[2] = {0, 0};
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for (int c = 0; c < num_opl_chips; ++c)
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{
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// Run the chip if it's active or if it has pending register writes
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if (opl_chip_timeouts[c] < OPL_CHIP_TIMEOUT || (opl_chips[c].writebuf[opl_chips[c].writebuf_cur].reg & 0x200))
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{
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Bit16s sample[2];
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OPL3_Generate(&opl_chips[c], sample);
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mix[0] += sample[0];
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mix[1] += sample[1];
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// Reset chip timeout if it breaks the silence threshold
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if (MAX(abs(sample[0]), abs(sample[1])) > OPL_SILENCE_THRESHOLD)
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opl_chip_timeouts[c] = 0;
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else
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opl_chip_timeouts[c]++;
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}
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}
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cursor[0] = BETWEEN(-32768, 32767, mix[0]);
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cursor[1] = BETWEEN(-32768, 32767, mix[1]);
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cursor += 2;
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}
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//OPL3_GenerateStream(&opl_chip, (Bit16s *)(buffer + filled * 4), nsamples);
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filled += nsamples;
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// Invoke callbacks for this point in time.
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AdvanceTime(nsamples);
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}
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return buffer_samples;
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}
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static void OPL_SDL_Shutdown(void)
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{
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OPL_Queue_Destroy(callback_queue);
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/*
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if (opl_chip != NULL)
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{
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OPLDestroy(opl_chip);
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opl_chip = NULL;
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}
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*/
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}
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static int OPL_SDL_Init(unsigned int port_base, int num_chips)
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{
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opl_sdl_paused = 0;
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pause_offset = 0;
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// Queue structure of callbacks to invoke.
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callback_queue = OPL_Queue_Create();
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current_time = 0;
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// Get the mixer frequency, format and number of channels.
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// Only supports AUDIO_S16SYS
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mixing_channels = 2;
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// Create the emulator structure:
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for (int c = 0; c < num_opl_chips; ++c)
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OPL3_Reset(&opl_chips[c], OPL_SAMPLE_RATE);
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opl_opl3mode = 0;
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for (int c = 0; c < OPL_MAX_CHIPS; ++c)
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{
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opl_chip_keys[c] = 0;
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opl_chip_timeouts[c] = OPL_CHIP_TIMEOUT;
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}
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return 1;
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}
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static unsigned int OPL_SDL_PortRead(int chip, opl_port_t port)
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{
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unsigned int result = 0;
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if (port == OPL_REGISTER_PORT_OPL3)
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{
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return 0xff;
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}
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if (chip > 0)
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return result;
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if (timer1.enabled && current_time > timer1.expire_time)
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{
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result |= 0x80; // Either have expired
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result |= 0x40; // Timer 1 has expired
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}
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if (timer2.enabled && current_time > timer2.expire_time)
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{
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result |= 0x80; // Either have expired
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result |= 0x20; // Timer 2 has expired
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}
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return result;
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}
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static void OPLTimer_CalculateEndTime(opl_timer_t *timer)
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{
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int tics;
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// If the timer is enabled, calculate the time when the timer
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// will expire.
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if (timer->enabled)
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{
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tics = 0x100 - timer->value;
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timer->expire_time = current_time
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+ ((uint64_t) tics * OPL_SECOND) / timer->rate;
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}
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}
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static void WriteRegister(int chip, unsigned int reg_num, unsigned int value)
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{
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switch (reg_num)
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{
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case OPL_REG_TIMER1:
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// Only allow timers on the first chip
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if (chip == 0)
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{
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timer1.value = value;
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OPLTimer_CalculateEndTime(&timer1);
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}
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break;
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case OPL_REG_TIMER2:
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// Only allow timers on the first chip
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if (chip == 0)
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{
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timer2.value = value;
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OPLTimer_CalculateEndTime(&timer2);
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}
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break;
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case OPL_REG_TIMER_CTRL:
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if (value & 0x80)
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{
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timer1.enabled = 0;
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timer2.enabled = 0;
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}
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else
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{
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if ((value & 0x40) == 0)
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{
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timer1.enabled = (value & 0x01) != 0;
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OPLTimer_CalculateEndTime(&timer1);
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}
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if ((value & 0x20) == 0)
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{
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timer2.enabled = (value & 0x02) != 0;
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OPLTimer_CalculateEndTime(&timer2);
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}
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}
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break;
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case OPL_REG_NEW:
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// Keep all chips synchronized with the first chip's opl3 mode
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if (chip == 0)
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{
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for (int c = 0; c < num_opl_chips; ++c)
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OPL3_WriteRegBuffered(&opl_chips[c], reg_num, value);
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opl_opl3mode = value & 0x01;
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}
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break;
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default:
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// Keep track of which channels are keyed-on so we know when the chip is in use
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if ((reg_num & 0xff) >= 0xb0 && (reg_num & 0xff) <= 0xb8)
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{
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uint32_t key_bit = 1 << (((reg_num & 0x100) ? 9 : 0) + (reg_num & 0xf));
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if (value & (1 << 5))
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opl_chip_keys[chip] |= key_bit;
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else
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opl_chip_keys[chip] &= ~key_bit;
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}
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OPL3_WriteRegBuffered(&opl_chips[chip], reg_num, value);
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break;
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}
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}
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static void OPL_SDL_PortWrite(int chip, opl_port_t port, unsigned int value)
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{
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if (port == OPL_REGISTER_PORT)
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{
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register_num = value;
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}
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else if (port == OPL_REGISTER_PORT_OPL3)
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{
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register_num = value | 0x100;
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}
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else if (port == OPL_DATA_PORT)
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{
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WriteRegister(chip, register_num, value);
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}
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}
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static void OPL_SDL_SetCallback(uint64_t us, opl_callback_t callback,
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void *data)
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{
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OPL_Queue_Push(callback_queue, callback, data,
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current_time - pause_offset + us);
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}
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static void OPL_SDL_ClearCallbacks(void)
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{
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OPL_Queue_Clear(callback_queue);
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}
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static void OPL_SDL_AdjustCallbacks(float factor)
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{
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OPL_Queue_AdjustCallbacks(callback_queue, current_time, factor);
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}
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opl_driver_t opl_sdl_driver =
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{
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"SDL",
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OPL_SDL_Init,
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OPL_SDL_Shutdown,
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OPL_SDL_PortRead,
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OPL_SDL_PortWrite,
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OPL_SDL_SetCallback,
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OPL_SDL_ClearCallbacks,
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OPL_SDL_AdjustCallbacks,
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};
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