Release Notes

planned as v0.10
- User can select the expressions representation format in the settings dialog.
- Better formatting of minimized expressions.
- easier editing of truth tables
- Mouse actions can be canceled by the ESC key.
- With CTRL + mouse button you can now select and move/delete wires.
- Added a real bidirectional switch and a relay.
- Added N and P channel FETs and some CMOS examples, including a 16 bit SRAM
- Improved and documented the file import strategy.
- added a tree view to insert components
- added support for the ATF1502 and ATF1504 CPLDs
- some minor bug fixes

v0.9, released on 03. Feb 2017
- improved documentation
- moved "show listing" functions to the assembly IDE.
- rearrangement of the components in the components menu
- made "don't care" as test case input values functional
- added a better test data parser which supports a "repeat([n])" statement.
  See the "combinatorial/FullAdderCLA.dig" as an example usage of the new "repeat([n])" statement.
- cleanup of splitter behaviour in respect of high z inputs
- fixed an error that caused an exception if a circuit which directly connects an input to an output
  is used as embedded circuit.
- some minor bug fixes

v0.8, released on 20. Nov 2016
- added pull up & pull down resistors and programmable diodes
- added some PLD examples like a simple PLA and GAL
- added GND, VDD and a switch
- added a help dialog for components
- added a simple documentation viewable via the help menu
- fixed "sometimes unwanted start of drawing a wire" problem (hopefully)
- some minor bug fixes

v0.7, released on 22. Aug 2016
- fixed a bug which causes two HighZ values to be not equal during test execution.
- added double buffer to CircuitComponent to make it more responsive
- improved debugging of processors
- some minor bug fixes

v0.6.2, released on 16. Aug 2016
- fixed scrolling bug in input/output orderer
- fixed redraw bug at element rotation
- fixed auto scale bug if element is deleted

v0.6.1, released on 10. Aug 2016
- fixed auto scaling bug which can occur if a new circuit is created
- added missing check for unsaved modifications
- fixed unexpected behaviour of 'C' character in test cases
- some minor bug fixes

v0.6, released on 09. Aug 2016
- fixed sync problems while drawing the circuit
- added Conway's Game of Life example
- some minor bug fixes

v0.5, released on 16. Jul 2016
- creation of state machines with JK-flip-flops
- added creation of JEDEC and CUPL files for GAL16v8 and GAL22v10
- some minor bug fixes

v0.4, released on 12. Jul 2016
- added a graphics card
- some minor bug fixes

v0.3.1, released on 07. Jul 2016
- some minor bug fixes

v0.3, released on 07. Jul 2016
- added testing functions
- some minor bug fixes

v0.2, released on 02. Jul 2016
- added expression parser
- creation of circuits from expressions
- some bug fixes

v0.1, released on 28. Jun 2016
- initial release
