diff --git a/distribution/ReleaseNotes.txt b/distribution/ReleaseNotes.txt
index 55f23c6b2..aa977da50 100644
--- a/distribution/ReleaseNotes.txt
+++ b/distribution/ReleaseNotes.txt
@@ -8,6 +8,7 @@ HEAD, planned as v0.26
 - Added a "Not Connected" component to output a constant high-z value.
 - If a high-z value is connected to a logic gate input, the read value
   is undefined.
+- It is now possible to use a probe as output in a test case.
 - Fixed a bug in the Demuxer Verilog template that causes problems
   when using multiple demuxers in the same circuit.
 - Generic circuits are easier to debug: It is possible now to create
diff --git a/src/main/java/de/neemann/digital/core/io/Probe.java b/src/main/java/de/neemann/digital/core/io/Probe.java
index 444eae3c8..9465f9682 100644
--- a/src/main/java/de/neemann/digital/core/io/Probe.java
+++ b/src/main/java/de/neemann/digital/core/io/Probe.java
@@ -56,7 +56,7 @@ public class Probe implements Element {
 
     @Override
     public void registerNodes(Model model) {
-        model.addSignal(new Signal(label, value).setShowInGraph(showInGraph).setFormat(format));
+        model.addOutput(new Signal(label, value).setShowInGraph(showInGraph).setFormat(format));
         model.registerGlobalValue(label, value);
     }