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added a register file component, fixes #104
This commit is contained in:
parent
0c550d4a32
commit
41b487a60e
@ -3,6 +3,7 @@ Release Notes
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HEAD, planned as v0.17
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- Added 64 bit support for Add and Sub components.
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- Added support of some more ATF150x chips.
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- Added a register file component.
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- Bug fixes
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- Splitter, BarrelShifter and Comparator now are working with 64 bit.
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@ -14,11 +14,6 @@ Single-Cycle CPU.</string>
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</entry>
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</attributes>
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<visualElements>
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<visualElement>
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<elementName>Register.dig</elementName>
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<elementAttributes/>
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<pos x="660" y="120"/>
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</visualElement>
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<visualElement>
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<elementName>Multiplexer</elementName>
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<elementAttributes>
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@ -53,7 +48,7 @@ Single-Cycle CPU.</string>
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<elementAttributes>
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<entry>
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<string>Value</string>
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<int>0</int>
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<long>0</long>
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</entry>
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<entry>
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<string>Bits</string>
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@ -67,7 +62,7 @@ Single-Cycle CPU.</string>
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<elementAttributes>
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<entry>
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<string>Value</string>
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<int>255</int>
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<long>255</long>
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</entry>
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<entry>
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<string>Bits</string>
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@ -81,7 +76,7 @@ Single-Cycle CPU.</string>
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<elementAttributes>
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<entry>
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<string>Value</string>
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<int>4095</int>
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<long>4095</long>
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</entry>
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<entry>
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<string>Bits</string>
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@ -848,6 +843,11 @@ Single-Cycle CPU.</string>
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<elementAttributes/>
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<pos x="1060" y="140"/>
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</visualElement>
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<visualElement>
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<elementName>RegisterOpt.dig</elementName>
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<elementAttributes/>
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<pos x="660" y="120"/>
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</visualElement>
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</visualElements>
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<wires>
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<wire>
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213
src/main/dig/processor/core/RegisterOpt.dig
Normal file
213
src/main/dig/processor/core/RegisterOpt.dig
Normal file
@ -0,0 +1,213 @@
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<?xml version="1.0" encoding="utf-8"?>
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<circuit>
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<version>1</version>
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<attributes>
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<entry>
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<string>Description</string>
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<string>In diesem Block befinden sich die 16
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Prozessorregister.</string>
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</entry>
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<entry>
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<string>Width</string>
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<int>5</int>
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</entry>
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</attributes>
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<visualElements>
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<visualElement>
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<elementName>In</elementName>
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<elementAttributes>
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<entry>
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<string>Description</string>
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<string>Daten die gespeichert werden sollen.
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Der hier anliegende Wert wird gespeichert, wenn
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der Eingang WE auf 1 geschaltet wird.</string>
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</entry>
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<entry>
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<string>Label</string>
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<string>WD</string>
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</entry>
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<entry>
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<string>Bits</string>
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<int>16</int>
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</entry>
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</elementAttributes>
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<pos x="100" y="140"/>
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</visualElement>
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<visualElement>
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<elementName>In</elementName>
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<elementAttributes>
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<entry>
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<string>Description</string>
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<string>Takt. Geht der Takt auf High, und ist WE auf High
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wird der Wert an WD im dem Register gespeichert,
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welches in dest angegeben ist.</string>
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</entry>
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<entry>
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<string>Label</string>
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<string>C</string>
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</entry>
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</elementAttributes>
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<pos x="200" y="200"/>
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</visualElement>
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<visualElement>
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<elementName>In</elementName>
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<elementAttributes>
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<entry>
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<string>Description</string>
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<string>Nummer des Source Registers. Legt fest, welches
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Register an Rsrc ausgegeben werden soll.</string>
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</entry>
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<entry>
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<string>Label</string>
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<string>src</string>
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</entry>
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<entry>
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<string>Bits</string>
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<int>4</int>
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</entry>
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</elementAttributes>
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<pos x="200" y="240"/>
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</visualElement>
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<visualElement>
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<elementName>In</elementName>
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<elementAttributes>
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<entry>
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<string>Description</string>
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<string>Nummer des Destignation Registers. Legt fest,
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welches Register an Rdest ausgegeben werden soll.
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Zudem wird dieses Register beschrieben, wenn
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WE auf 1 gesetzt wird.</string>
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</entry>
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<entry>
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<string>Label</string>
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<string>dest</string>
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</entry>
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<entry>
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<string>Bits</string>
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<int>4</int>
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</entry>
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</elementAttributes>
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<pos x="100" y="220"/>
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</visualElement>
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<visualElement>
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<elementName>In</elementName>
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<elementAttributes>
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<entry>
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<string>Description</string>
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<string>Das Speichern aktivieren. Wenn dieser Eingang auf
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High geht, wird der Wert an WD in dem Register
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gespeichert, welches in dest angegeben ist.</string>
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</entry>
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<entry>
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<string>Label</string>
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<string>WE</string>
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</entry>
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</elementAttributes>
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<pos x="200" y="160"/>
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</visualElement>
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<visualElement>
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<elementName>Out</elementName>
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<elementAttributes>
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<entry>
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<string>Description</string>
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<string>Inhalt des Destignation Registers.
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Welches Register ausgegeben wird, wird mittels
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des Eingangs dest festgelegt.</string>
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</entry>
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<entry>
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<string>Label</string>
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<string>Rdest</string>
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</entry>
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<entry>
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<string>Bits</string>
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<int>16</int>
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</entry>
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</elementAttributes>
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<pos x="360" y="140"/>
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</visualElement>
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<visualElement>
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<elementName>Out</elementName>
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<elementAttributes>
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<entry>
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<string>Description</string>
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<string>Inhalt des Source Registers. Welches Register
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ausgegeben wird, wird mittels des Einganges src
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festgelegt.</string>
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</entry>
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<entry>
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<string>Label</string>
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<string>Rsrc</string>
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</entry>
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<entry>
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<string>Bits</string>
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<int>16</int>
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</entry>
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</elementAttributes>
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<pos x="360" y="180"/>
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</visualElement>
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<visualElement>
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<elementName>RegisterFile</elementName>
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<elementAttributes>
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<entry>
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<string>AddrBits</string>
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<int>4</int>
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</entry>
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<entry>
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<string>Bits</string>
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<int>16</int>
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</entry>
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</elementAttributes>
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<pos x="240" y="140"/>
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</visualElement>
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</visualElements>
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<wires>
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<wire>
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<p1 x="320" y="160"/>
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<p2 x="340" y="160"/>
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</wire>
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<wire>
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<p1 x="200" y="160"/>
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<p2 x="240" y="160"/>
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</wire>
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<wire>
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<p1 x="200" y="240"/>
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<p2 x="240" y="240"/>
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</wire>
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<wire>
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<p1 x="340" y="180"/>
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<p2 x="360" y="180"/>
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</wire>
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<wire>
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<p1 x="220" y="180"/>
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<p2 x="240" y="180"/>
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</wire>
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<wire>
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<p1 x="200" y="200"/>
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<p2 x="240" y="200"/>
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</wire>
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<wire>
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<p1 x="320" y="140"/>
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<p2 x="360" y="140"/>
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</wire>
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<wire>
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<p1 x="100" y="140"/>
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<p2 x="240" y="140"/>
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</wire>
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<wire>
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<p1 x="100" y="220"/>
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<p2 x="220" y="220"/>
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</wire>
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<wire>
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<p1 x="220" y="220"/>
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<p2 x="240" y="220"/>
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</wire>
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<wire>
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<p1 x="340" y="160"/>
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<p2 x="340" y="180"/>
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</wire>
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<wire>
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<p1 x="220" y="180"/>
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<p2 x="220" y="220"/>
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</wire>
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</wires>
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</circuit>
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130
src/main/java/de/neemann/digital/core/memory/RegisterFile.java
Normal file
130
src/main/java/de/neemann/digital/core/memory/RegisterFile.java
Normal file
@ -0,0 +1,130 @@
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package de.neemann.digital.core.memory;
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import de.neemann.digital.core.Node;
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import de.neemann.digital.core.NodeException;
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import de.neemann.digital.core.ObservableValue;
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import de.neemann.digital.core.ObservableValues;
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import de.neemann.digital.core.element.Element;
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import de.neemann.digital.core.element.ElementAttributes;
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import de.neemann.digital.core.element.ElementTypeDescription;
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import de.neemann.digital.core.element.Keys;
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import static de.neemann.digital.core.element.PinInfo.input;
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/**
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* A register file with two output a one input port.
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*
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* @author hneemann
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*/
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public class RegisterFile extends Node implements Element, RAMInterface {
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/**
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* The RAMs {@link ElementTypeDescription}
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*/
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public static final ElementTypeDescription DESCRIPTION = new ElementTypeDescription(RegisterFile.class,
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input("Din"),
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input("we"),
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input("Rw"),
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input("C"),
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input("Ra"),
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input("Rb"))
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.addAttribute(Keys.ROTATE)
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.addAttribute(Keys.BITS)
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.addAttribute(Keys.ADDR_BITS)
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.addAttribute(Keys.LABEL);
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private final DataField memory;
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private final ObservableValue out1;
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private final ObservableValue out2;
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private final int addrBits;
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private final int bits;
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private final String label;
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private final int size;
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private ObservableValue reg1In;
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private ObservableValue reg2In;
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private ObservableValue regWIn;
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private ObservableValue data1In;
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private ObservableValue weIn;
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private ObservableValue clk1In;
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private int reg1;
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private int reg2;
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private boolean lastClk = false;
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/**
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* Creates a new instance
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*
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* @param attr the elements attributes
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*/
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public RegisterFile(ElementAttributes attr) {
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super(true);
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bits = attr.get(Keys.BITS);
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out1 = new ObservableValue("Da", bits).setPinDescription(DESCRIPTION);
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out2 = new ObservableValue("Db", bits).setPinDescription(DESCRIPTION);
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addrBits = attr.get(Keys.ADDR_BITS);
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size = 1 << addrBits;
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memory = new DataField(size);
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label = attr.getCleanLabel();
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}
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@Override
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public void setInputs(ObservableValues inputs) throws NodeException {
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this.data1In = inputs.get(0).checkBits(bits, this);
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this.weIn = inputs.get(1).checkBits(1, this);
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this.regWIn = inputs.get(2).checkBits(addrBits, this);
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this.clk1In = inputs.get(3).checkBits(1, this).addObserverToValue(this);
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this.reg1In = inputs.get(4).checkBits(addrBits, this).addObserverToValue(this);
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this.reg2In = inputs.get(5).checkBits(addrBits, this).addObserverToValue(this);
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}
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@Override
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public ObservableValues getOutputs() {
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return new ObservableValues(out1, out2);
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}
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@Override
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public void readInputs() throws NodeException {
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boolean clk = clk1In.getBool();
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boolean str = !lastClk && clk && weIn.getBool();
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if (str) {
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long data = data1In.getValue();
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int regW = (int) regWIn.getValue();
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memory.setData(regW, data);
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}
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reg1 = (int) reg1In.getValue();
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reg2 = (int) reg2In.getValue();
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lastClk = clk;
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}
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@Override
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public void writeOutputs() throws NodeException {
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out1.setValue(memory.getDataWord(reg1));
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out2.setValue(memory.getDataWord(reg2));
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}
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@Override
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public DataField getMemory() {
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return memory;
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}
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@Override
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public String getLabel() {
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return label;
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}
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@Override
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public int getSize() {
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return size;
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}
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@Override
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public int getDataBits() {
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return bits;
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}
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@Override
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public int getAddrBits() {
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return addrBits;
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}
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}
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@ -152,6 +152,7 @@ public class ElementLibrary implements Iterable<ElementLibrary.ElementContainer>
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.add(EEPROM.DESCRIPTION)
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.add(GraphicCard.DESCRIPTION)
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.add(RAMDualAccess.DESCRIPTION)
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.add(RegisterFile.DESCRIPTION)
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.add(Counter.DESCRIPTION))
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.add(new LibraryNode(Lang.get("lib_arithmetic"))
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.add(Add.DESCRIPTION)
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|
@ -37,10 +37,23 @@ public class RAMShape extends GenericShape {
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* @throws PinException PinException
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*/
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||||
public RAMShape(ElementAttributes attr, ElementTypeDescription description) throws NodeException, PinException {
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this(attr, description, 3);
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||||
}
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||||
|
||||
/**
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||||
* Creates a new instance
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||||
*
|
||||
* @param attr the attributes of the element
|
||||
* @param description element type description
|
||||
* @param width the used width
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||||
* @throws NodeException NodeException
|
||||
* @throws PinException PinException
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||||
*/
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||||
public RAMShape(ElementAttributes attr, ElementTypeDescription description, int width) throws NodeException, PinException {
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||||
super(description.getShortName(),
|
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description.getInputDescription(attr),
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||||
description.getOutputDescriptions(attr),
|
||||
attr.getLabel(), true);
|
||||
attr.getLabel(), true, width);
|
||||
if (attr.getLabel().length() > 0)
|
||||
dialogTitle = attr.getLabel();
|
||||
else
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||||
|
@ -77,6 +77,7 @@ public final class ShapeFactory {
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||||
map.put(RAMSinglePortSel.DESCRIPTION.getName(), (attr, inputs, outputs) -> new RAMShape(attr, RAMSinglePortSel.DESCRIPTION));
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||||
map.put(EEPROM.DESCRIPTION.getName(), (attr, inputs, outputs) -> new RAMShape(attr, EEPROM.DESCRIPTION));
|
||||
map.put(RAMDualAccess.DESCRIPTION.getName(), (attr, inputs, outputs) -> new RAMShape(attr, RAMDualAccess.DESCRIPTION));
|
||||
map.put(RegisterFile.DESCRIPTION.getName(), (attr, inputs, outputs) -> new RAMShape(attr, RegisterFile.DESCRIPTION, 4));
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||||
|
||||
map.put(In.DESCRIPTION.getName(), InputShape::new);
|
||||
map.put(Reset.DESCRIPTION.getName(), ResetShape::new);
|
||||
|
@ -467,6 +467,20 @@
|
||||
<string name="elem_RAMDualAccess_pin_ld">Ist diese Leitung high, wird der Ausgang D1 aktiviert, und die Daten liegen dort an.</string>
|
||||
<string name="elem_RAMDualAccess_pin_str">Ist diese Leitung high, wird das Datenwort an D1 gespeichert, wenn der Takt ansteigt.</string>
|
||||
|
||||
<string name="elem_RegisterFile">Registerspeicher</string>
|
||||
<string name="elem_RegisterFile_short">Register</string>
|
||||
<string name="elem_RegisterFile_tt">Speicher mit einem Schreib- und zwei Leseports. Kann verwendet werden um
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||||
Prozessorregister zu implementieren.
|
||||
Es können so gleichzeitig zwei Register gelesen und ein Drittes beschrieben werden.</string>
|
||||
<string name="elem_RegisterFile_pin_Da">Inhalt des Registers a.</string>
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<string name="elem_RegisterFile_pin_Db">Inhalt des Registers b.</string>
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||||
<string name="elem_RegisterFile_pin_Ra">Nummer des Registers a.</string>
|
||||
<string name="elem_RegisterFile_pin_Rb">Nummer des Registers b.</string>
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||||
<string name="elem_RegisterFile_pin_Rw">Nummer des zu beschreibenden Registers.</string>
|
||||
<string name="elem_RegisterFile_pin_we">Bei einer 1 werden die Daten in das Register Rw übernommen.</string>
|
||||
<string name="elem_RegisterFile_pin_C">Takteingang</string>
|
||||
<string name="elem_RegisterFile_pin_Din">Die zu schreibenden Daten.</string>
|
||||
|
||||
<string name="elem_Counter">Zähler</string>
|
||||
<string name="elem_Counter_short">Zähler</string>
|
||||
<string name="elem_Counter_tt">Ein einfacher Zähler-Baustein.
|
||||
|
@ -470,6 +470,20 @@
|
||||
<string name="elem_RAMDualAccess_pin_ld">If this input is high the output is activated and the data is visible at the output 1D.</string>
|
||||
<string name="elem_RAMDualAccess_pin_str">If this input is high and when the clock becomes high, the the data is stored.</string>
|
||||
|
||||
<string name="elem_RegisterFile">Register File</string>
|
||||
<string name="elem_RegisterFile_short">Register</string>
|
||||
<string name="elem_RegisterFile_tt">Memory with one port that allows to write and two ports that allow to read from
|
||||
the memory simultaneously. Can be used to implement processor registers.
|
||||
Two registers can be read simultaneously and a third can be written.</string>
|
||||
<string name="elem_RegisterFile_pin_Da">Output Port a</string>
|
||||
<string name="elem_RegisterFile_pin_Db">Output Port b</string>
|
||||
<string name="elem_RegisterFile_pin_Ra">The register which is visible at port a.</string>
|
||||
<string name="elem_RegisterFile_pin_Rb">The register which is visible at port b.</string>
|
||||
<string name="elem_RegisterFile_pin_Rw">The register into which the data is written.</string>
|
||||
<string name="elem_RegisterFile_pin_we">If this input is high and when the clock becomes high, the the data is stored.</string>
|
||||
<string name="elem_RegisterFile_pin_C">Clock</string>
|
||||
<string name="elem_RegisterFile_pin_Din">The data to be stored in the register Rw.</string>
|
||||
|
||||
<string name="elem_Counter">Counter</string>
|
||||
<string name="elem_Counter_short">count</string>
|
||||
<string name="elem_Counter_tt">A simple counter component. The clock input increases the counter.
|
||||
|
32
src/main/resources/vhdl/DIG_RegisterFile.vhdl
Normal file
32
src/main/resources/vhdl/DIG_RegisterFile.vhdl
Normal file
@ -0,0 +1,32 @@
|
||||
LIBRARY ieee;
|
||||
USE ieee.std_logic_1164.all;
|
||||
USE ieee.numeric_std.all;
|
||||
|
||||
entity DIG_RegisterFile is
|
||||
generic (
|
||||
Bits : integer;
|
||||
AddrBits : integer );
|
||||
port (
|
||||
PORT_Da: out std_logic_vector ((Bits-1) downto 0);
|
||||
PORT_Db: out std_logic_vector ((Bits-1) downto 0);
|
||||
PORT_Din: in std_logic_vector ((Bits-1) downto 0);
|
||||
PORT_we: in std_logic;
|
||||
PORT_Rw: in std_logic_vector ((AddrBits-1) downto 0);
|
||||
PORT_C: in std_logic;
|
||||
PORT_Ra: in std_logic_vector ((AddrBits-1) downto 0);
|
||||
PORT_Rb: in std_logic_vector ((AddrBits-1) downto 0) );
|
||||
end DIG_RegisterFile;
|
||||
|
||||
architecture DIG_RegisterFile_arch of DIG_RegisterFile is
|
||||
type memoryType is array(0 to (2**AddrBits)-1) of STD_LOGIC_VECTOR((Bits-1) downto 0);
|
||||
signal memory : memoryType;
|
||||
begin
|
||||
process ( PORT_C )
|
||||
begin
|
||||
if rising_edge(PORT_C) AND (PORT_we='1') then
|
||||
memory(to_integer(unsigned(PORT_Rw))) <= PORT_Din;
|
||||
end if;
|
||||
end process;
|
||||
PORT_Da <= memory(to_integer(unsigned(PORT_Ra)));
|
||||
PORT_Db <= memory(to_integer(unsigned(PORT_Rb)));
|
||||
end DIG_RegisterFile_arch;
|
@ -0,0 +1,43 @@
|
||||
package de.neemann.digital.core.memory;
|
||||
|
||||
import de.neemann.digital.TestExecuter;
|
||||
import de.neemann.digital.core.Model;
|
||||
import de.neemann.digital.core.ObservableValue;
|
||||
import de.neemann.digital.core.element.ElementAttributes;
|
||||
import de.neemann.digital.core.element.Keys;
|
||||
import junit.framework.TestCase;
|
||||
|
||||
import static de.neemann.digital.TestExecuter.HIGHZ;
|
||||
import static de.neemann.digital.core.ObservableValues.ovs;
|
||||
|
||||
/**
|
||||
* @author hneemann
|
||||
*/
|
||||
public class RegisterFileTest extends TestCase {
|
||||
|
||||
public void testRegisterFile() throws Exception {
|
||||
ObservableValue ra = new ObservableValue("ra", 2);
|
||||
ObservableValue rb = new ObservableValue("rb", 2);
|
||||
ObservableValue rw = new ObservableValue("rw", 2);
|
||||
ObservableValue in = new ObservableValue("in", 4);
|
||||
ObservableValue we = new ObservableValue("we", 1);
|
||||
ObservableValue clk = new ObservableValue("clk", 1);
|
||||
|
||||
Model model = new Model();
|
||||
RegisterFile out = model.add(new RegisterFile(
|
||||
new ElementAttributes()
|
||||
.set(Keys.ADDR_BITS, 2)
|
||||
.setBits(4)));
|
||||
out.setInputs(ovs(in, we, rw, clk, ra, rb));
|
||||
|
||||
TestExecuter sc = new TestExecuter(model).setInputs(clk, in, we, rw, ra, rb).setOutputs(out.getOutputs());
|
||||
// c in we rw ra rb da db
|
||||
sc.check(0, 0, 0, 0, 0, 0, 0, 0);
|
||||
sc.check(1, 7, 1, 1, 0, 0, 0, 0);
|
||||
sc.check(0, 0, 0, 0, 1, 1, 7, 7);
|
||||
sc.check(1, 5, 1, 2, 1, 1, 7, 7);
|
||||
sc.check(0, 0, 0, 0, 1, 2, 7, 5);
|
||||
}
|
||||
|
||||
|
||||
}
|
@ -37,7 +37,7 @@ public class TestInSimulator extends TestCase {
|
||||
File examples = new File(Resources.getRoot(), "/dig/test/vhdl");
|
||||
try {
|
||||
int tested = new FileScanner(this::check).scan(examples);
|
||||
assertEquals(25, tested);
|
||||
assertEquals(26, tested);
|
||||
assertEquals(tested, testBenches);
|
||||
} catch (FileScanner.SkipAllException e) {
|
||||
// if ghdl is not installed its also ok
|
||||
@ -79,7 +79,7 @@ public class TestInSimulator extends TestCase {
|
||||
|
||||
/*
|
||||
public void testInSimulatorDebug() throws Exception {
|
||||
File file = new File(Resources.getRoot(),"dig/test/vhdl/priorityEncoder.dig");
|
||||
File file = new File(Resources.getRoot(),"dig/test/vhdl/registerFile.dig");
|
||||
|
||||
ToBreakRunner br = new ToBreakRunner(file);
|
||||
System.out.println(new VHDLGenerator(br.getLibrary(), new CodePrinterStr(true)).export(br.getCircuit()));
|
||||
|
@ -40,8 +40,8 @@ public class TestExamples extends TestCase {
|
||||
*/
|
||||
public void testTestExamples() throws Exception {
|
||||
File examples = new File(Resources.getRoot(), "/dig/test");
|
||||
assertEquals(115, new FileScanner(this::check).scan(examples));
|
||||
assertEquals(105, testCasesInFiles);
|
||||
assertEquals(116, new FileScanner(this::check).scan(examples));
|
||||
assertEquals(106, testCasesInFiles);
|
||||
}
|
||||
|
||||
|
||||
|
236
src/test/resources/dig/test/vhdl/registerFile.dig
Normal file
236
src/test/resources/dig/test/vhdl/registerFile.dig
Normal file
@ -0,0 +1,236 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<circuit>
|
||||
<version>1</version>
|
||||
<attributes/>
|
||||
<visualElements>
|
||||
<visualElement>
|
||||
<elementName>Out</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Label</string>
|
||||
<string>Da</string>
|
||||
</entry>
|
||||
<entry>
|
||||
<string>Bits</string>
|
||||
<int>8</int>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="600" y="200"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>Out</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Label</string>
|
||||
<string>Db</string>
|
||||
</entry>
|
||||
<entry>
|
||||
<string>Bits</string>
|
||||
<int>8</int>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="600" y="240"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>In</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Label</string>
|
||||
<string>Rw</string>
|
||||
</entry>
|
||||
<entry>
|
||||
<string>Bits</string>
|
||||
<int>4</int>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="360" y="280"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>In</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Label</string>
|
||||
<string>C</string>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="360" y="320"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>In</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Label</string>
|
||||
<string>we</string>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="360" y="240"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>In</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Label</string>
|
||||
<string>Ra</string>
|
||||
</entry>
|
||||
<entry>
|
||||
<string>Bits</string>
|
||||
<int>4</int>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="360" y="360"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>In</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Label</string>
|
||||
<string>Di</string>
|
||||
</entry>
|
||||
<entry>
|
||||
<string>Bits</string>
|
||||
<int>8</int>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="360" y="200"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>In</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Label</string>
|
||||
<string>Rb</string>
|
||||
</entry>
|
||||
<entry>
|
||||
<string>Bits</string>
|
||||
<int>4</int>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="360" y="400"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>Testcase</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>Testdata</string>
|
||||
<testData>
|
||||
<dataString>C we Di Rw Ra Rb Da Db
|
||||
|
||||
# write all registers
|
||||
loop (a, 16)
|
||||
c 1 (a*10) (a) 0 0 x x
|
||||
end loop
|
||||
|
||||
# read registers
|
||||
loop (a, 16)
|
||||
0 0 0 0 (a) 0 (a*10) 0
|
||||
0 0 0 0 0 (a) 0 (a*10)
|
||||
0 0 0 0 (a) (a) (a*10) (a*10)
|
||||
end loop
|
||||
|
||||
0 1 1 0 0 0 0 0
|
||||
1 1 1 0 0 0 1 1
|
||||
0 0 0 0 0 0 1 1
|
||||
</dataString>
|
||||
</testData>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="540" y="360"/>
|
||||
</visualElement>
|
||||
<visualElement>
|
||||
<elementName>RegisterFile</elementName>
|
||||
<elementAttributes>
|
||||
<entry>
|
||||
<string>AddrBits</string>
|
||||
<int>4</int>
|
||||
</entry>
|
||||
<entry>
|
||||
<string>Bits</string>
|
||||
<int>8</int>
|
||||
</entry>
|
||||
</elementAttributes>
|
||||
<pos x="480" y="200"/>
|
||||
</visualElement>
|
||||
</visualElements>
|
||||
<wires>
|
||||
<wire>
|
||||
<p1 x="580" y="240"/>
|
||||
<p2 x="600" y="240"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="360" y="240"/>
|
||||
<p2 x="380" y="240"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="400" y="240"/>
|
||||
<p2 x="480" y="240"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="360" y="320"/>
|
||||
<p2 x="420" y="320"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="360" y="400"/>
|
||||
<p2 x="460" y="400"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="420" y="260"/>
|
||||
<p2 x="480" y="260"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="560" y="200"/>
|
||||
<p2 x="600" y="200"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="360" y="200"/>
|
||||
<p2 x="480" y="200"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="360" y="280"/>
|
||||
<p2 x="400" y="280"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="440" y="280"/>
|
||||
<p2 x="480" y="280"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="360" y="360"/>
|
||||
<p2 x="440" y="360"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="560" y="220"/>
|
||||
<p2 x="580" y="220"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="380" y="220"/>
|
||||
<p2 x="480" y="220"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="460" y="300"/>
|
||||
<p2 x="480" y="300"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="400" y="240"/>
|
||||
<p2 x="400" y="280"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="580" y="220"/>
|
||||
<p2 x="580" y="240"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="420" y="260"/>
|
||||
<p2 x="420" y="320"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="440" y="280"/>
|
||||
<p2 x="440" y="360"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="380" y="220"/>
|
||||
<p2 x="380" y="240"/>
|
||||
</wire>
|
||||
<wire>
|
||||
<p1 x="460" y="300"/>
|
||||
<p2 x="460" y="400"/>
|
||||
</wire>
|
||||
</wires>
|
||||
</circuit>
|
Loading…
x
Reference in New Issue
Block a user