From 4af6b1e0789254a94144ca5db5fb27a03b7679bc Mon Sep 17 00:00:00 2001 From: hneemann Date: Thu, 23 Jan 2020 21:56:40 +0100 Subject: [PATCH] typo --- src/main/resources/lang/lang_en.xml | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/main/resources/lang/lang_en.xml b/src/main/resources/lang/lang_en.xml index ef7fedd4a..d4e6e83dc 100644 --- a/src/main/resources/lang/lang_en.xml +++ b/src/main/resources/lang/lang_en.xml @@ -2042,8 +2042,8 @@ Therefore, the signal 'D_out' is also available to check the value in this case.

What can be seen in the graph?

- Unlike a real logic analyzer, the X-axis of the measurement graph does not show time. - A counter is displayed which counts the changes of state in the circuit. + Unlike a real logic analyzer, the X-axis of the measurement graph does not show the time. + Instead a counter is displayed which counts the changes of state in the circuit. Whenever there is a change in the circuit, the counter is incremented and the new state is displayed.
You can also think of it as a classic logic analyzer, which does not save any data for optimization if nothing has changed in the circuit. @@ -2053,8 +2053,8 @@ Therefore, the signal 'D_out' is also available to check the value in this case. concept of time. A change is made to the circuit, and the change in the circuit state is calculated, until the circuit has stabilized again. Then the next change is made, the effect of which is also is calculated and so on. These changes are counted and the counter value is displayed on the X-axis of the graph.
- Among other things, this means that a circuit cannot be overclocked, since the effects of the falling edge - of the clock are not calculated until the circuit has stabilized after the previous rising edge. + Among other things, this also means that a circuit cannot be overclocked, since the effects of the falling + edge of the clock are not calculated until the circuit has stabilized after the previous rising edge. ]]> @@ -2111,4 +2111,4 @@ Therefore, the signal 'D_out' is also available to check the value in this case. Skip Tutorial - \ No newline at end of file +