From 4eaee08f24186e8f021cdd8a21dbfdac88b403c8 Mon Sep 17 00:00:00 2001 From: hneemann Date: Tue, 13 Sep 2016 19:43:05 +0200 Subject: [PATCH] typo --- src/main/dig/test/JK-MS.dig | 2 +- src/main/resources/lang/lang_en.xml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/main/dig/test/JK-MS.dig b/src/main/dig/test/JK-MS.dig index a4b97e1ed..57a216eb3 100644 --- a/src/main/dig/test/JK-MS.dig +++ b/src/main/dig/test/JK-MS.dig @@ -144,7 +144,7 @@ - + diff --git a/src/main/resources/lang/lang_en.xml b/src/main/resources/lang/lang_en.xml index e2ef56305..a47ffba7d 100644 --- a/src/main/resources/lang/lang_en.xml +++ b/src/main/resources/lang/lang_en.xml @@ -249,7 +249,7 @@ To analyse you can run the circuit in single gate step mode. Wires Test About - Analyse + Analysis Analyses the actual circuit Copy Custom