From 6c2bec3b6934d5252d414602f8774012f201a6cc Mon Sep 17 00:00:00 2001 From: hneemann Date: Tue, 14 May 2019 23:34:43 +0200 Subject: [PATCH] added vivado tool chain support --- distribution/Assembly.xml | 1 + src/main/dig/hdl/BASYS3.xml | 68 +++++++ src/main/dig/hdl/TinyFPGA_BX_Config.xml | 174 ++++++++++++++++++ src/main/dig/sequential/RS-T.dig | 80 +++++--- .../de/neemann/digital/core/element/Keys.java | 6 +- .../java/de/neemann/digital/gui/Main.java | 2 +- .../java/de/neemann/digital/gui/Settings.java | 2 +- .../de/neemann/digital/hdl/hgs/Tokenizer.java | 3 + .../hdl/verilog2/VerilogGenerator.java | 10 +- .../digital/hdl/vhdl2/VHDLGenerator.java | 10 +- .../de/neemann/digital/ide/Configuration.java | 132 ++++++++++--- src/main/resources/lang/lang_de.xml | 4 +- src/main/resources/lang/lang_en.xml | 4 +- .../digital/ide/ConfigurationTest.java | 10 +- 14 files changed, 433 insertions(+), 73 deletions(-) create mode 100644 src/main/dig/hdl/BASYS3.xml create mode 100644 src/main/dig/hdl/TinyFPGA_BX_Config.xml diff --git a/distribution/Assembly.xml b/distribution/Assembly.xml index b225c5f1e..d1fffb2c8 100644 --- a/distribution/Assembly.xml +++ b/distribution/Assembly.xml @@ -121,6 +121,7 @@ /examples/hdl/ *.dig + *.xml diff --git a/src/main/dig/hdl/BASYS3.xml b/src/main/dig/hdl/BASYS3.xml new file mode 100644 index 000000000..680feb56d --- /dev/null +++ b/src/main/dig/hdl/BASYS3.xml @@ -0,0 +1,68 @@ + + + + + + + + ]]> + + + \n");?> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +]]> + + + diff --git a/src/main/dig/hdl/TinyFPGA_BX_Config.xml b/src/main/dig/hdl/TinyFPGA_BX_Config.xml new file mode 100644 index 000000000..412ed561b --- /dev/null +++ b/src/main/dig/hdl/TinyFPGA_BX_Config.xml @@ -0,0 +1,174 @@ + + + + make + + + make + prog + + + + + # Makefile borrowed from https://github.com/cliffordwolf/icestorm/blob/master/examples/icestick/Makefile +# +# The following license is from the icestorm project and specifically applies to this file only: +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +PROJ = <?=shortname?> + +PIN_DEF = pins.pcf +DEVICE = lp8k + +#all: $(PROJ).rpt $(PROJ).bin +all: $(PROJ).bin + +%.blif: %.v + yosys -p 'synth_ice40 -top $(PROJ) -blif $@' $< + +%.asc: $(PIN_DEF) %.blif + arachne-pnr -d 8k -P cm81 -o $@ -p $^ + +%.bin: %.asc + icepack $< $@ + +%.rpt: %.asc + icetime -d $(DEVICE) -C C:\Users\helmut.neemann\.apio\packages\toolchain-icestorm\share\icebox -mtr $@ $< + +%_tb: %_tb.v %.v + iverilog -o $@ $^ + +%_tb.vcd: %_tb + vvp -N $< +vcd=$@ + +%_syn.v: %.blif + yosys -p 'read_blif -wideports $^; write_verilog $@' + +%_syntb: %_tb.v %_syn.v + iverilog -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v` + +%_syntb.vcd: %_syntb + vvp -N $< +vcd=$@ + +prog: $(PROJ).bin + tinyprog -p $< + +sudo-prog: $(PROJ).bin + @echo 'Executing prog as root!!!' + sudo tinyprog -p $< + +clean: + rm -f $(PROJ).blif $(PROJ).asc $(PROJ).rpt $(PROJ).bin + +.SECONDARY: +.PHONY: all prog clean + + + ############################################################################### +# +# TinyFPGA BX constraint file (.pcf) +# +############################################################################### +# +# Copyright (c) 2018, Luke Valenty +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, this +# list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# The views and conclusions contained in the software and documentation are those +# of the authors and should not be interpreted as representing official policies, +# either expressed or implied, of the <project name> project. +# +############################################################################### + +#### +# TinyFPGA BX information: https://github.com/tinyfpga/TinyFPGA-BX/ +#### + +# Left side of board +set_io --warn-no-port PIN_1 A2 +set_io --warn-no-port PIN_2 A1 +set_io --warn-no-port PIN_3 B1 +set_io --warn-no-port PIN_4 C2 +set_io --warn-no-port PIN_5 C1 +set_io --warn-no-port PIN_6 D2 +set_io --warn-no-port PIN_7 D1 +set_io --warn-no-port PIN_8 E2 +set_io --warn-no-port PIN_9 E1 +set_io --warn-no-port PIN_10 G2 +set_io --warn-no-port PIN_11 H1 +set_io --warn-no-port PIN_12 J1 +set_io --warn-no-port PIN_13 H2 + +# Right side of board +set_io --warn-no-port PIN_14 H9 +set_io --warn-no-port PIN_15 D9 +set_io --warn-no-port PIN_16 D8 +set_io --warn-no-port PIN_17 C9 +set_io --warn-no-port PIN_18 A9 +set_io --warn-no-port PIN_19 B8 +set_io --warn-no-port PIN_20 A8 +set_io --warn-no-port PIN_21 B7 +set_io --warn-no-port PIN_22 A7 +set_io --warn-no-port PIN_23 B6 +set_io --warn-no-port PIN_24 A6 + +# SPI flash interface on bottom of board +set_io --warn-no-port SPI_SS F7 +set_io --warn-no-port SPI_SCK G7 +set_io --warn-no-port SPI_IO0 G6 +set_io --warn-no-port SPI_IO1 H7 +set_io --warn-no-port SPI_IO2 H4 +set_io --warn-no-port SPI_IO3 J8 + +# General purpose pins on bottom of board +set_io --warn-no-port PIN_25 G1 +set_io --warn-no-port PIN_26 J3 +set_io --warn-no-port PIN_27 J4 +set_io --warn-no-port PIN_28 G9 +set_io --warn-no-port PIN_29 J9 +set_io --warn-no-port PIN_30 E8 +set_io --warn-no-port PIN_31 J2 + +# LED +set_io --warn-no-port LED B3 + +# USB +set_io --warn-no-port USBP B4 +set_io --warn-no-port USBN A4 +set_io --warn-no-port USBPU A3 + +# 16MHz clock +set_io --warn-no-port CLK B2 # input + + + diff --git a/src/main/dig/sequential/RS-T.dig b/src/main/dig/sequential/RS-T.dig index a0d59aa6c..474028374 100644 --- a/src/main/dig/sequential/RS-T.dig +++ b/src/main/dig/sequential/RS-T.dig @@ -1,6 +1,7 @@ 1 + NOr @@ -20,7 +21,7 @@ S - + In @@ -30,7 +31,7 @@ C - + Out @@ -70,22 +71,22 @@ R - + And - - Delay - - - Not - - + + + wideShape + true + + + Testcase @@ -104,6 +105,26 @@ X 0 X 1 0 + + Not + + + wideShape + true + + + + + + Not + + + wideShape + true + + + + @@ -127,11 +148,11 @@ X 0 X 1 0 - + - + @@ -155,20 +176,24 @@ X 0 X 1 0 - + - - + + - - + + + + + + @@ -183,8 +208,8 @@ X 0 X 1 0 - - + + @@ -194,6 +219,14 @@ X 0 X 1 0 + + + + + + + + @@ -210,13 +243,6 @@ X 0 X 1 0 - - - - - - - - + \ No newline at end of file diff --git a/src/main/java/de/neemann/digital/core/element/Keys.java b/src/main/java/de/neemann/digital/core/element/Keys.java index 4191fe83b..1a996f729 100644 --- a/src/main/java/de/neemann/digital/core/element/Keys.java +++ b/src/main/java/de/neemann/digital/core/element/Keys.java @@ -464,7 +464,7 @@ public final class Keys { * enables the MAC mouse mode */ public static final Key SETTINGS_MAC_MOUSE - = new Key<>("macMouse", Screen.isMac()).setRequiresRestart().setSecondary(); + = new Key<>("macMouse", Screen.isMac()).setRequiresRestart(); /** * output format for numbers @@ -781,7 +781,7 @@ public final class Keys { /** * Stores the IDE settings file */ - public static final Key SETTINGS_IDE_CONFIG = - new Key.KeyFile("ideSettings", new File("")).setSecondary().setRequiresRestart(); + public static final Key SETTINGS_TOOLCHAIN_CONFIG = + new Key.KeyFile("toolChainConfig", new File("")).setSecondary().setRequiresRestart(); } diff --git a/src/main/java/de/neemann/digital/gui/Main.java b/src/main/java/de/neemann/digital/gui/Main.java index ae1d2eaab..c4df22c8e 100644 --- a/src/main/java/de/neemann/digital/gui/Main.java +++ b/src/main/java/de/neemann/digital/gui/Main.java @@ -294,7 +294,7 @@ public final class Main extends JFrame implements ClosingWindowListener.ConfirmS private void checkIDEIntegration(MainBuilder builder, JMenuBar menuBar) { if (builder.mainFrame) { - File f = Settings.getInstance().get(Keys.SETTINGS_IDE_CONFIG); + File f = Settings.getInstance().get(Keys.SETTINGS_TOOLCHAIN_CONFIG); if (f.getPath().length() > 0) { try { menuBar.add( diff --git a/src/main/java/de/neemann/digital/gui/Settings.java b/src/main/java/de/neemann/digital/gui/Settings.java index 14326584c..28ac9bbb9 100644 --- a/src/main/java/de/neemann/digital/gui/Settings.java +++ b/src/main/java/de/neemann/digital/gui/Settings.java @@ -58,7 +58,7 @@ public final class Settings implements AttributeListener { intList.add(Keys.SETTINGS_ATMISP); intList.add(Keys.SETTINGS_GHDL_PATH); intList.add(Keys.SETTINGS_IVERILOG_PATH); - intList.add(Keys.SETTINGS_IDE_CONFIG); + intList.add(Keys.SETTINGS_TOOLCHAIN_CONFIG); intList.add(Keys.SETTINGS_FONT_SCALING); intList.add(Keys.SETTINGS_MAC_MOUSE); diff --git a/src/main/java/de/neemann/digital/hdl/hgs/Tokenizer.java b/src/main/java/de/neemann/digital/hdl/hgs/Tokenizer.java index 568dfd8f7..1cfdc42cf 100644 --- a/src/main/java/de/neemann/digital/hdl/hgs/Tokenizer.java +++ b/src/main/java/de/neemann/digital/hdl/hgs/Tokenizer.java @@ -253,6 +253,9 @@ class Tokenizer { case 't': c = '\t'; break; + case '"': + c = '"'; + break; default: throw new IOException("not allowed in string: \\" + (char) c); } diff --git a/src/main/java/de/neemann/digital/hdl/verilog2/VerilogGenerator.java b/src/main/java/de/neemann/digital/hdl/verilog2/VerilogGenerator.java index 74f29f75f..c807c948c 100644 --- a/src/main/java/de/neemann/digital/hdl/verilog2/VerilogGenerator.java +++ b/src/main/java/de/neemann/digital/hdl/verilog2/VerilogGenerator.java @@ -35,6 +35,7 @@ public class VerilogGenerator implements Closeable { private final CodePrinter out; private ArrayList testBenches; private boolean useClockIntegration = true; + private HDLModel model; /** * Creates a new exporter @@ -66,7 +67,7 @@ public class VerilogGenerator implements Closeable { if (board != null && useClockIntegration) clockIntegrator = board.getClockIntegrator(); - HDLModel model = new HDLModel(library).create(circuit, clockIntegrator); + model = new HDLModel(library).create(circuit, clockIntegrator); for (HDLCircuit hdlCircuit : model) hdlCircuit.applyDefaultOptimizations(); @@ -155,6 +156,13 @@ public class VerilogGenerator implements Closeable { out.close(); } + /** + * @return the used hdl model + */ + public HDLModel getModel() { + return model; + } + /** * Disables the clock integration. * Used only for the tests. diff --git a/src/main/java/de/neemann/digital/hdl/vhdl2/VHDLGenerator.java b/src/main/java/de/neemann/digital/hdl/vhdl2/VHDLGenerator.java index 0bc775d9f..9464c3b29 100644 --- a/src/main/java/de/neemann/digital/hdl/vhdl2/VHDLGenerator.java +++ b/src/main/java/de/neemann/digital/hdl/vhdl2/VHDLGenerator.java @@ -39,6 +39,7 @@ public class VHDLGenerator implements Closeable { private final CodePrinter out; private ArrayList testBenches; private boolean useClockIntegration = true; + private HDLModel model; /** * Creates a new exporter @@ -70,7 +71,7 @@ public class VHDLGenerator implements Closeable { if (board != null && useClockIntegration) clockIntegrator = board.getClockIntegrator(); - HDLModel model = new HDLModel(library).create(circuit, clockIntegrator); + model = new HDLModel(library).create(circuit, clockIntegrator); for (HDLCircuit hdlCircuit : model) hdlCircuit.applyDefaultOptimizations(); @@ -161,4 +162,11 @@ public class VHDLGenerator implements Closeable { useClockIntegration = false; return this; } + + /** + * @return the hdl model + */ + public HDLModel getModel() { + return model; + } } diff --git a/src/main/java/de/neemann/digital/ide/Configuration.java b/src/main/java/de/neemann/digital/ide/Configuration.java index dd3a96348..9f1859a58 100644 --- a/src/main/java/de/neemann/digital/ide/Configuration.java +++ b/src/main/java/de/neemann/digital/ide/Configuration.java @@ -11,10 +11,10 @@ import de.neemann.digital.core.extern.ProcessStarter; import de.neemann.digital.draw.elements.Circuit; import de.neemann.digital.draw.library.ElementLibrary; import de.neemann.digital.gui.SaveAsHelper; -import de.neemann.digital.hdl.hgs.Context; -import de.neemann.digital.hdl.hgs.HGSEvalException; -import de.neemann.digital.hdl.hgs.Parser; -import de.neemann.digital.hdl.hgs.ParserException; +import de.neemann.digital.hdl.hgs.*; +import de.neemann.digital.hdl.model2.HDLCircuit; +import de.neemann.digital.hdl.model2.HDLModel; +import de.neemann.digital.hdl.model2.HDLPort; import de.neemann.digital.hdl.printer.CodePrinter; import de.neemann.digital.hdl.verilog2.VerilogGenerator; import de.neemann.digital.hdl.vhdl2.VHDLGenerator; @@ -80,7 +80,8 @@ public final class Configuration { private transient FilenameProvider filenameProvider; private transient CircuitProvider circuitProvider; private transient LibraryProvider libraryProvider; - private transient FileWriter fileWriter; + private transient IOInterface ioInterface; + private Configuration() { files = new ArrayList<>(); @@ -120,8 +121,8 @@ public final class Configuration { return this; } - Configuration setFileWriter(FileWriter fileWriter) { - this.fileWriter = fileWriter; + Configuration setIoInterface(IOInterface ioInterface) { + this.ioInterface = ioInterface; return this; } @@ -137,8 +138,8 @@ public final class Configuration { return menu; } - private void checkFilesToCreate(File fileToExecute) throws HGSEvalException, IOException, ParserException { - Context context = createContext(fileToExecute); + private void checkFilesToCreate(File fileToExecute, HDLModel hdlModel) throws HGSEvalException, IOException, ParserException { + Context context = createContext(fileToExecute, hdlModel); if (files != null) for (FileToCreate f : files) { @@ -156,25 +157,28 @@ public final class Configuration { content = context.toString(); } - try (OutputStream out = getFileWriter().getOutputStream(filename)) { + try (OutputStream out = getIoInterface().getOutputStream(filename)) { out.write(content.getBytes()); } } } } - private Context createContext(File fileToExecute) throws HGSEvalException { - return new Context() + private Context createContext(File fileToExecute, HDLModel hdlModel) throws HGSEvalException { + final Context context = new Context() .declareVar("path", fileToExecute.getPath()) .declareVar("dir", fileToExecute.getParentFile()) .declareVar("name", fileToExecute.getName()) .declareVar("shortname", createShortname(fileToExecute.getName())); + if (hdlModel != null) + context.declareVar("hdl", new ModelAccess(hdlModel.getMain())); + return context; } - private FileWriter getFileWriter() { - if (fileWriter == null) - fileWriter = new DefaultFileWriter(); - return fileWriter; + private IOInterface getIoInterface() { + if (ioInterface == null) + ioInterface = new DefaultIOInterface(); + return ioInterface; } private String createShortname(String name) { @@ -184,22 +188,22 @@ public final class Configuration { return name; } - private void writeHDL(String hdl, File digFile) throws IOException { + private HDLModel writeHDL(String hdl, File digFile) throws IOException { switch (hdl) { case "verilog": File verilogFile = SaveAsHelper.checkSuffix(digFile, "v"); - final CodePrinter verilogPrinter = new CodePrinter(getFileWriter().getOutputStream(verilogFile)); + final CodePrinter verilogPrinter = new CodePrinter(getIoInterface().getOutputStream(verilogFile)); try (VerilogGenerator vlog = new VerilogGenerator(libraryProvider.getCurrentLibrary(), verilogPrinter)) { vlog.export(circuitProvider.getCurrentCircuit()); + return vlog.getModel(); } - break; case "vhdl": File vhdlFile = SaveAsHelper.checkSuffix(digFile, "vhdl"); - final CodePrinter vhdlPrinter = new CodePrinter(getFileWriter().getOutputStream(vhdlFile)); + final CodePrinter vhdlPrinter = new CodePrinter(getIoInterface().getOutputStream(vhdlFile)); try (VHDLGenerator vlog = new VHDLGenerator(libraryProvider.getCurrentLibrary(), vhdlPrinter)) { vlog.export(circuitProvider.getCurrentCircuit()); + return vlog.getModel(); } - break; default: throw new IOException(Lang.get("err_hdlNotKnown_N", hdl)); } @@ -215,25 +219,26 @@ public final class Configuration { if (digFile != null) { try { + HDLModel hdlModel = null; if (command.needsHDL()) - writeHDL(command.getHDL(), digFile); + hdlModel = writeHDL(command.getHDL(), digFile); - checkFilesToCreate(digFile); + checkFilesToCreate(digFile, hdlModel); String[] args = command.getArgs(); if (command.isFilter()) { final int argCount = command.getArgs().length; - Context context = createContext(digFile); + Context context = createContext(digFile, hdlModel); for (int i = 0; i < argCount; i++) { context.clearOutput(); new Parser(args[i]).parse().execute(context); args[i] = context.toString(); } } - - getFileWriter().startProcess(digFile.getParentFile(), args); + if (args != null) + getIoInterface().startProcess(digFile.getParentFile(), args); } catch (Exception e) { - getFileWriter().showError(command, e); + getIoInterface().showError(command, e); } } } @@ -289,7 +294,7 @@ public final class Configuration { /** * Interface used to write a file */ - public interface FileWriter { + public interface IOInterface { /** * Creates an output stream @@ -318,10 +323,15 @@ public final class Configuration { void showError(Command command, Exception e); } - private static final class DefaultFileWriter implements FileWriter { + private static final class DefaultIOInterface implements IOInterface { @Override - public OutputStream getOutputStream(File filename) throws FileNotFoundException { + public OutputStream getOutputStream(File filename) throws IOException { + final File parentFile = filename.getParentFile(); + if (!parentFile.exists()) { + if (!parentFile.mkdirs()) + throw new IOException("could not create "+parentFile); + } return new FileOutputStream(filename); } @@ -335,4 +345,66 @@ public final class Configuration { new ErrorMessage(Lang.get("msg_errorStartCommand_N", command.getName())).addCause(e).show(); } } + + private static final class ModelAccess implements HGSMap { + private final HDLCircuit hdlCircuit; + + private ModelAccess(HDLCircuit hdlCircuit) { + this.hdlCircuit = hdlCircuit; + } + + @Override + public Object hgsMapGet(String key) throws HGSEvalException { + switch (key) { + case "ports": + return new PortsArray(hdlCircuit.getPorts()); + default: + throw new HGSEvalException("field " + key + " not found!"); + } + } + } + + private static final class PortsArray implements HGSArray { + private final ArrayList ports; + + private PortsArray(ArrayList ports) { + this.ports = ports; + } + + @Override + public int hgsArraySize() { + return ports.size(); + } + + @Override + public Object hgsArrayGet(int i) { + return new Port(ports.get(i)); + } + } + + private static final class Port implements HGSMap { + private final HDLPort hdlPort; + + private Port(HDLPort hdlPort) { + this.hdlPort = hdlPort; + } + + @Override + public Object hgsMapGet(String key) throws HGSEvalException { + switch (key) { + case "dir": + return hdlPort.getDirection().name(); + case "name": + return hdlPort.getName(); + case "bits": + return hdlPort.getBits(); + case "pin": + return hdlPort.getPinNumber(); + case "clock": + return hdlPort.isClock(); + default: + throw new HGSEvalException("field " + key + " not found!"); + } + } + } } diff --git a/src/main/resources/lang/lang_de.xml b/src/main/resources/lang/lang_de.xml index 088c4f111..9b890bd3a 100644 --- a/src/main/resources/lang/lang_de.xml +++ b/src/main/resources/lang/lang_de.xml @@ -1332,8 +1332,8 @@ Sind evtl. die Namen der Variablen nicht eindeutig? Aktiviert Aktiviert oder deaktiviert diese Komponente. - IDE-Einstellungen - Kann für eine IDE-Integration verwendet werden. + Tool Chain + Kann für eine Integration einer externen Tool Chain verwendet werden. Erlaubt den Start externer Tools, um z.B. einen FPGA zu programmieren o.ä. Leitung eingefügt. diff --git a/src/main/resources/lang/lang_en.xml b/src/main/resources/lang/lang_en.xml index 217aad2ee..f86f09865 100644 --- a/src/main/resources/lang/lang_en.xml +++ b/src/main/resources/lang/lang_en.xml @@ -1320,8 +1320,8 @@ Enabled Enables or disables this component. - IDE settings - Used to configurate an IDE integration. + Tool Chain + Used to configurate an integration of a tool chain. Allows the start of external tools, e.g. to program an FPGA or similar. Inserted wire. diff --git a/src/test/java/de/neemann/digital/ide/ConfigurationTest.java b/src/test/java/de/neemann/digital/ide/ConfigurationTest.java index 92961abb8..414a3e534 100644 --- a/src/test/java/de/neemann/digital/ide/ConfigurationTest.java +++ b/src/test/java/de/neemann/digital/ide/ConfigurationTest.java @@ -35,12 +35,12 @@ public class ConfigurationTest extends TestCase { ToBreakRunner br = new ToBreakRunner(new File(Resources.getRoot(), "dig/hdl/negSimple.dig")); - final TestFileWriter fileWriter = new TestFileWriter(); + final TestIOInterface fileWriter = new TestIOInterface(); Configuration c = Configuration.load(new ByteArrayInputStream(xml.getBytes())) .setFilenameProvider(() -> new File("z/test.dig")) .setCircuitProvider(br::getCircuit) .setLibraryProvider(br::getLibrary) - .setFileWriter(fileWriter); + .setIoInterface(fileWriter); ArrayList commands = c.getCommands(); assertEquals(2, commands.size()); @@ -87,12 +87,12 @@ public class ConfigurationTest extends TestCase { ToBreakRunner br = new ToBreakRunner(new File(Resources.getRoot(), "dig/hdl/negSimple.dig")); - final TestFileWriter fileWriter = new TestFileWriter(); + final TestIOInterface fileWriter = new TestIOInterface(); Configuration c = Configuration.load(new ByteArrayInputStream(xml.getBytes())) .setFilenameProvider(() -> new File("z/test.dig")) .setCircuitProvider(br::getCircuit) .setLibraryProvider(br::getLibrary) - .setFileWriter(fileWriter); + .setIoInterface(fileWriter); ArrayList commands = c.getCommands(); assertEquals(1, commands.size()); @@ -105,7 +105,7 @@ public class ConfigurationTest extends TestCase { } - private class TestFileWriter implements Configuration.FileWriter { + private class TestIOInterface implements Configuration.IOInterface { private HashMap files = new HashMap<>(); private ArrayList commands = new ArrayList<>();