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updates the release notes

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hneemann 2020-11-23 10:10:29 +01:00
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distribution/ReleaseNotes.txt
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@ -9,6 +9,7 @@ HEAD, planned as v0.26
- If a high-z value is connected to a logic gate input, the read value
is undefined.
- It is now possible to use a probe as output in a test case.
- Adds undo to text fields
- Fixed a bug in the Demuxer Verilog template that causes problems
when using multiple demuxers in the same circuit.
- Generic circuits are easier to debug: It is possible now to create