From 8ef847e05627f6484fa939c703c25f06570fe895 Mon Sep 17 00:00:00 2001 From: hneemann Date: Fri, 14 Apr 2017 14:15:51 +0200 Subject: [PATCH] modified some example circuits --- src/main/dig/cmos/sram_simple.dig | 552 ++++++++++++++++++ src/main/dig/combinatorial/Bus.dig | 19 +- src/main/dig/combinatorial/Comp7485.dig | 14 + src/main/dig/combinatorial/Comp7485Parall.dig | 13 + src/main/dig/combinatorial/FullAddSub_RC.dig | 16 + src/main/dig/combinatorial/FullAdderRC.dig | 16 + src/main/dig/combinatorial/LUT.dig | 92 +-- .../digital/integration/TestExamples.java | 4 +- 8 files changed, 668 insertions(+), 58 deletions(-) create mode 100644 src/main/dig/cmos/sram_simple.dig diff --git a/src/main/dig/cmos/sram_simple.dig b/src/main/dig/cmos/sram_simple.dig new file mode 100644 index 000000000..b03c5a57b --- /dev/null +++ b/src/main/dig/cmos/sram_simple.dig @@ -0,0 +1,552 @@ + + + 1 + + + NFET + + + + + PFET + + + + + NFET + + + + + PFET + + + + + NFET + + + rotation + + + + + + + NFET + + + rotation + + + + + + + PullDown + + + + + PullDown + + + + + PullUp + + + + + PullUp + + + + + LED + + + rotation + + + + + + + In + + + Description + Wortleitung 0 + + + Label + WL0 + + + + + + Driver + + + rotation + + + + flipSelPos + true + + + + + + Driver + + + rotation + + + + + + + In + + + Description + Write Enable + + + Label + WE + + + + + + In + + + Description + Data Input + + + Label + Data + + + + + + Not + + + rotation + + + + + + + Out + + + Description + Data Output + + + Label + D + + + + + + NFET + + + + + PFET + + + + + NFET + + + + + PFET + + + + + NFET + + + rotation + + + + + + + NFET + + + rotation + + + + + + + PullDown + + + + + PullDown + + + + + PullUp + + + + + PullUp + + + + + LED + + + rotation + + + + + + + In + + + Description + Wortleitung 1 + + + Label + WL1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/src/main/dig/combinatorial/Bus.dig b/src/main/dig/combinatorial/Bus.dig index 5f02a13f1..d046cfdbd 100644 --- a/src/main/dig/combinatorial/Bus.dig +++ b/src/main/dig/combinatorial/Bus.dig @@ -151,16 +151,6 @@ ist. Die jeweils anderen Ausgänge sind hochohmig. - - Const - - - Value - 0 - - - - Testcase @@ -233,6 +223,11 @@ ist. Die jeweils anderen Ausgänge sind hochohmig. + + Ground + + + @@ -351,6 +346,10 @@ ist. Die jeweils anderen Ausgänge sind hochohmig. + + + + diff --git a/src/main/dig/combinatorial/Comp7485.dig b/src/main/dig/combinatorial/Comp7485.dig index f222f3c4f..2114b1a5f 100644 --- a/src/main/dig/combinatorial/Comp7485.dig +++ b/src/main/dig/combinatorial/Comp7485.dig @@ -205,6 +205,20 @@ Bits übereinstimmen. + + Testcase + + + Testdata + + P<Q_i P=Q_i P>Q_i P_3 P_2 P_1 P_0 Q_3 Q_2 Q_1 Q_0 P<Q P=Q P>Q +repeat(256) 0 1 0 bits(4,n>>4) bits(4,n) ((n>>4)<(n&15)) ((n>>4)=(n&15)) ((n>>4)>(n&15)) +repeat(2<<(3+4)) bits(3,n) bits(4,n>>3) bits(4,n>>3) bits(3,n) + + + + + diff --git a/src/main/dig/combinatorial/Comp7485Parall.dig b/src/main/dig/combinatorial/Comp7485Parall.dig index 820385f14..9aab4af73 100644 --- a/src/main/dig/combinatorial/Comp7485Parall.dig +++ b/src/main/dig/combinatorial/Comp7485Parall.dig @@ -419,6 +419,19 @@ + + Testcase + + + Testdata + + A_11 A_10 A_9 A_8 A_7 A_6 A_5 A_4 A_3 A_2 A_1 A_0 B_11 B_10 B_9 B_8 B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 P<Q P=Q P>Q +repeat(1<<16) bits(12,n>>8) bits(12,n&0xff) ((n>>8)<(n&0xff)) ((n>>8)=(n&0xff)) ((n>>8)>(n&0xff)) + + + + + diff --git a/src/main/dig/combinatorial/FullAddSub_RC.dig b/src/main/dig/combinatorial/FullAddSub_RC.dig index 316393d85..f11b0956e 100644 --- a/src/main/dig/combinatorial/FullAddSub_RC.dig +++ b/src/main/dig/combinatorial/FullAddSub_RC.dig @@ -185,6 +185,22 @@ Subtraction (S=1) umgeschaltet werden kann. + + Testcase + + + Testdata + + + S A_3 A_2 A_1 A_0 B_3 B_2 B_1 B_0 S_3 S_2 S_1 S_0 +repeat(256) 0 bits(4,n>>4) bits(4,n) bits(4,(n>>4)+(n&15)) +repeat(256) 1 bits(4,n>>4) bits(4,n) bits(4,(n>>4)-(n&15)) + + + + + + diff --git a/src/main/dig/combinatorial/FullAdderRC.dig b/src/main/dig/combinatorial/FullAdderRC.dig index e68a3cb63..8f9f2e618 100644 --- a/src/main/dig/combinatorial/FullAdderRC.dig +++ b/src/main/dig/combinatorial/FullAdderRC.dig @@ -31,6 +31,10 @@ aus vier Volladdierern. Label A_0 + + Default + 1 + @@ -66,6 +70,10 @@ aus vier Volladdierern. Label A_1 + + Default + 1 + @@ -111,6 +119,10 @@ aus vier Volladdierern. Label B_2 + + Default + 1 + @@ -146,6 +158,10 @@ aus vier Volladdierern. Label B_3 + + Default + 1 + diff --git a/src/main/dig/combinatorial/LUT.dig b/src/main/dig/combinatorial/LUT.dig index 5f1dc1f3e..6575f124c 100644 --- a/src/main/dig/combinatorial/LUT.dig +++ b/src/main/dig/combinatorial/LUT.dig @@ -41,7 +41,7 @@ logische Funktion mit zwei Eingängen nachbilden. Ground - + Switch @@ -59,12 +59,12 @@ logische Funktion mit zwei Eingängen nachbilden. S_3 - + Ground - + Switch @@ -78,12 +78,12 @@ logische Funktion mit zwei Eingängen nachbilden. S_2 - + Ground - + Switch @@ -97,12 +97,12 @@ logische Funktion mit zwei Eingängen nachbilden. S_1 - + Ground - + Switch @@ -120,27 +120,27 @@ logische Funktion mit zwei Eingängen nachbilden. S_0 - + PullUp - + PullUp - + PullUp - + PullUp - + Out @@ -182,7 +182,7 @@ definiert. - + @@ -194,7 +194,7 @@ definiert. - + @@ -202,7 +202,7 @@ definiert. - + @@ -218,7 +218,7 @@ definiert. - + @@ -226,28 +226,16 @@ definiert. - - + + - - + + - - - - - - - - - - - - - - + + @@ -258,28 +246,40 @@ definiert. - - + + - - + + - - + + - - + + - - + + - - + + + + + + + + + + + + + + \ No newline at end of file diff --git a/src/test/java/de/neemann/digital/integration/TestExamples.java b/src/test/java/de/neemann/digital/integration/TestExamples.java index ac44b8bb3..a164ece1c 100644 --- a/src/test/java/de/neemann/digital/integration/TestExamples.java +++ b/src/test/java/de/neemann/digital/integration/TestExamples.java @@ -28,8 +28,8 @@ public class TestExamples extends TestCase { */ public void testDistExamples() throws Exception { File examples = new File(Resources.getRoot().getParentFile().getParentFile(), "/main/dig"); - assertEquals(109, new FileScanner(this::check).scan(examples)); - assertEquals(55, testCasesInFiles); + assertEquals(110, new FileScanner(this::check).scan(examples)); + assertEquals(58, testCasesInFiles); } /**