diff --git a/src/main/java/de/neemann/digital/hdl/model2/optimizations/InlineManyToOne.java b/src/main/java/de/neemann/digital/hdl/model2/optimizations/InlineManyToOne.java
index 28c2aba7c..c7340a63d 100644
--- a/src/main/java/de/neemann/digital/hdl/model2/optimizations/InlineManyToOne.java
+++ b/src/main/java/de/neemann/digital/hdl/model2/optimizations/InlineManyToOne.java
@@ -21,7 +21,7 @@ public class InlineManyToOne implements Optimization {
             if (node instanceof HDLNodeAssignment) {
                 HDLNodeAssignment assign = (HDLNodeAssignment) node;
                 final HDLNet net = assign.getTargetNet();
-                if (net.getInputs().size() == 1) {
+                if (net != null && net.getInputs().size() == 1) {
                     HDLNode receiver = net.getInputs().get(0).getParent();
                     if (receiver instanceof HDLNodeSplitterManyToOne) {
                         HDLNodeSplitterManyToOne mto = (HDLNodeSplitterManyToOne) receiver;
diff --git a/src/main/java/de/neemann/digital/hdl/verilog2/VerilogCreator.java b/src/main/java/de/neemann/digital/hdl/verilog2/VerilogCreator.java
index 4fbfeedf4..78d8a118c 100644
--- a/src/main/java/de/neemann/digital/hdl/verilog2/VerilogCreator.java
+++ b/src/main/java/de/neemann/digital/hdl/verilog2/VerilogCreator.java
@@ -61,7 +61,7 @@ public class VerilogCreator {
      * @return the verilog signal type
      */
     public static String getType(HDLPort.Direction dir, int bits) {
-        String result = (dir == HDLPort.Direction.IN)? "input" : "output";
+        String result = (dir == HDLPort.Direction.IN) ? "input" : "output";
 
         if (bits > 1) {
             result += " [" + (bits - 1) + ":0]";
@@ -110,7 +110,7 @@ public class VerilogCreator {
      * Prints the given circuit to the output.
      * Also all needed entities are printed.
      *
-     * @param circuit the circuit to print
+     * @param circuit    the circuit to print
      * @param moduleName the module name
      * @throws IOException      IOException
      * @throws HDLException     HDLException
@@ -244,7 +244,7 @@ public class VerilogCreator {
         String instanceName = entityName.trim() + "_i" + num;
 
         out.print(instanceName + " ")
-           .println("(");
+                .println("(");
 
         out.inc();
         Separator sep = new Separator(out, ",\n");
@@ -265,9 +265,11 @@ public class VerilogCreator {
     }
 
     private void printExpression(HDLNodeAssignment node) throws IOException, HDLException {
-        out.print("assign ").print(node.getTargetNet().getName()).print(" = ");
-        printExpression(node.getExpression());
-        out.println(";");
+        if (node.getTargetNet() != null) {
+            out.print("assign ").print(node.getTargetNet().getName()).print(" = ");
+            printExpression(node.getExpression());
+            out.println(";");
+        }
     }
 
     private void printExpression(Expression expression) throws IOException, HDLException {
diff --git a/src/main/java/de/neemann/digital/hdl/vhdl2/VHDLCreator.java b/src/main/java/de/neemann/digital/hdl/vhdl2/VHDLCreator.java
index 2b0da1966..aa6519012 100644
--- a/src/main/java/de/neemann/digital/hdl/vhdl2/VHDLCreator.java
+++ b/src/main/java/de/neemann/digital/hdl/vhdl2/VHDLCreator.java
@@ -254,9 +254,11 @@ public class VHDLCreator {
     }
 
     private void printExpression(HDLNodeAssignment node) throws IOException, HDLException {
-        out.print(node.getTargetNet().getName()).print(" <= ");
-        printExpression(node.getExpression());
-        out.println(";");
+        if (node.getTargetNet() != null) {
+            out.print(node.getTargetNet().getName()).print(" <= ");
+            printExpression(node.getExpression());
+            out.println(";");
+        }
     }
 
     private void printExpression(Expression expression) throws IOException, HDLException {