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fixed flaky test in VHDLExample.dig

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hneemann 2017-08-31 18:38:58 +02:00
parent 32f13e4d8d
commit aead304ec1
1 changed files with 0 additions and 4 deletions
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src/main/dig/processor/VHDLExample.dig
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@ -341,10 +341,6 @@ Single-Cycle CPU.</string>
<string>pinNumber</string>
<string>U18</string>
</entry>
<entry>
<string>InDefault</string>
<value v="1" z="false"/>
</entry>
</elementAttributes>
<pos x="980" y="260"/>
</visualElement>