From bb7d24e4e22aa0b1bdb86c8969ae17ac5b53ee4c Mon Sep 17 00:00:00 2001
From: hneemann <helmut.neemann@arcor.de>
Date: Sat, 21 Sep 2019 12:34:44 +0200
Subject: [PATCH] added a .gitignore file to the processor example folder

---
 src/main/dig/processor/.gitignore     |  3 +++
 src/main/dig/processor/HDLExample.dig | 21 +++++++++++----------
 src/main/dig/processor/VGAExample.dig | 11 +++++++++++
 3 files changed, 25 insertions(+), 10 deletions(-)
 create mode 100644 src/main/dig/processor/.gitignore

diff --git a/src/main/dig/processor/.gitignore b/src/main/dig/processor/.gitignore
new file mode 100644
index 000000000..9ce610f09
--- /dev/null
+++ b/src/main/dig/processor/.gitignore
@@ -0,0 +1,3 @@
+*.vhdl
+*.xdc
+vivado
diff --git a/src/main/dig/processor/HDLExample.dig b/src/main/dig/processor/HDLExample.dig
index 7cd8b7689..e024081bf 100644
--- a/src/main/dig/processor/HDLExample.dig
+++ b/src/main/dig/processor/HDLExample.dig
@@ -343,16 +343,6 @@
       </elementAttributes>
       <pos x="920" y="260"/>
     </visualElement>
-    <visualElement>
-      <elementName>Text</elementName>
-      <elementAttributes>
-        <entry>
-          <string>Description</string>
-          <string>Board: BASYS3</string>
-        </entry>
-      </elementAttributes>
-      <pos x="400" y="200"/>
-    </visualElement>
     <visualElement>
       <elementName>Testcase</elementName>
       <elementAttributes>
@@ -562,6 +552,17 @@ end loop
       </elementAttributes>
       <pos x="1220" y="460"/>
     </visualElement>
+    <visualElement>
+      <elementName>Text</elementName>
+      <elementAttributes>
+        <entry>
+          <string>Description</string>
+          <string>Pin numbers are defined to match the BASYS3 FPGA board.
+{{de Die Pin-Nummern sind definiert für ein BASYS3 FPGA  Board.}}</string>
+        </entry>
+      </elementAttributes>
+      <pos x="400" y="140"/>
+    </visualElement>
   </visualElements>
   <wires>
     <wire>
diff --git a/src/main/dig/processor/VGAExample.dig b/src/main/dig/processor/VGAExample.dig
index 7a3415d37..c5eee6ed3 100644
--- a/src/main/dig/processor/VGAExample.dig
+++ b/src/main/dig/processor/VGAExample.dig
@@ -1040,6 +1040,17 @@
       </elementAttributes>
       <pos x="720" y="620"/>
     </visualElement>
+    <visualElement>
+      <elementName>Text</elementName>
+      <elementAttributes>
+        <entry>
+          <string>Description</string>
+          <string>Pin numbers are defined to match the BASYS3 FPGA board.
+{{de Die Pin-Nummern sind definiert für ein BASYS3 FPGA  Board.}}</string>
+        </entry>
+      </elementAttributes>
+      <pos x="280" y="160"/>
+    </visualElement>
   </visualElements>
   <wires>
     <wire>