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README.md
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README.md
@ -30,7 +30,7 @@ These are the main features of Digital:
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- Many examples: From a transmission gate D-flip-flop to a complete (simple) MIPS-like single cycle CPU.
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- Fast-run mode to perform a simulation without updating the GUI.
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A simple processor can be clocked at 100kHz.
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- Display of LST files when executing [assembler](https://github.com/hneemann/Assembler) programs within such a processor.
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- Display of LST files when executing assembly programs within such a processor.
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- Simple remote TCP interface which e.g. enables an [assembler IDE](https://github.com/hneemann/Assembler) to control the simulator.
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- Direct export of JEDEC files which you can flash to a [GAL16v8](http://www.atmel.com/devices/ATF16V8C.aspx)
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or a [GAL22v10](http://www.atmel.com/devices/ATF22V10C.aspx). These chips are somewhat outdated (introduced in 1985!) but
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@ -91,15 +91,17 @@ This way you can see how a signal change propagates in a circuit, thus you are a
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Similar to Logisim, Digital also allows to embed previously saved circuits in new designs, so hierarchical
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circuits can be created. However, in Digital embedded circuits are included as often as
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the circuit is used. This is similar to a C program in which all
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function calls are compiled as inlined functions. This is similar to a real circuit: Each circuit is "physically present"
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as often as it is used in the circuit. Although this approach increases the size of the data structure,
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function calls are compiled as inlined functions. And this is also similar to a real circuit:
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Each sub circuit is "physically present" as often as it is used in the design.
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Although this approach increases the size of the data structure of the simulation model in memory,
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it simplifies the simulation itself.
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Thus, for example, the inputs and outputs of an embedded circuit not specifically treat, they simply don't exist anymore
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after the formation of the simulations model. Even bidirectional connections can be implemented.
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Because of that approach for instance a separately embedded AND gate behaves exactly like an AND gate inserted at top
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level although there is actually no difference between these two variants from the simulation perspective.
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Logisim works somewhat different, which sometimes leads to surprises like unexpected signal propagation times.
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Thus, for example, the inputs and outputs of an embedded circuit are not specifically treat, they simply don't
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exist anymore after the formation of the simulation model. Even bidirectional connections can be implemented easily.
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Because of that approach for instance a embedded AND gate in a sub circuit behaves exactly like an AND gate
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inserted at top level although there is actually no difference between these two variants from the
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simulation models perspective.
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Logisim works somewhat different, which sometimes leads to surprises like unexpected signal propagation times and
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which makes it difficult to use bidirectional pins.
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### Performance ###
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