diff --git a/src/main/java/de/neemann/digital/hdl/verilog2/VerilogCreator.java b/src/main/java/de/neemann/digital/hdl/verilog2/VerilogCreator.java index 78d8a118c..1020815ee 100644 --- a/src/main/java/de/neemann/digital/hdl/verilog2/VerilogCreator.java +++ b/src/main/java/de/neemann/digital/hdl/verilog2/VerilogCreator.java @@ -56,12 +56,17 @@ public class VerilogCreator { /** * Returns the verilog type for a signal * - * @param dir the signal type (input or output) + * @param def the signal type (input or output) used if dir is not "inout" + * @param dir used to check if direction is "inout" * @param bits the number of bits * @return the verilog signal type */ - public static String getType(HDLPort.Direction dir, int bits) { - String result = (dir == HDLPort.Direction.IN) ? "input" : "output"; + public static String getType(HDLPort.Direction def, HDLPort.Direction dir, int bits) { + String result; + if (dir == HDLPort.Direction.INOUT) + result = "inout"; + else + result = (def == HDLPort.Direction.IN) ? "input" : "output"; if (bits > 1) { result += " [" + (bits - 1) + ":0]"; @@ -181,12 +186,12 @@ public class VerilogCreator { for (HDLPort i : circuit.getInputs()) { sep.check(); - out.print(getType(HDLPort.Direction.IN, i.getBits())).print(" ").print(i.getName()); + out.print(getType(HDLPort.Direction.IN, i.getDirection(), i.getBits())).print(" ").print(i.getName()); if (i.hasDescription()) sep.setLineFinalizer(ou -> ou.printComment(" // ", i.getDescription())); } for (HDLPort o : circuit.getOutputs()) { sep.check(); - out.print(getType(HDLPort.Direction.OUT, o.getBits())).print(" ").print(o.getName()); + out.print(getType(HDLPort.Direction.OUT, o.getDirection(), o.getBits())).print(" ").print(o.getName()); if (o.hasDescription()) sep.setLineFinalizer(ou -> ou.printComment(" // ", o.getDescription())); } sep.close(); @@ -260,6 +265,12 @@ public class VerilogCreator { sep.check(); out.print(".").print(o.getName()).print("( ").print(o.getNet().getName()).print(" )"); } + + for (HDLPort o : node.getInOutputs()) + if (o.getNet() != null) { + sep.check(); + out.print(".").print(o.getName()).print("( ").print(o.getNet().getName()).print(" )"); + } out.dec(); out.println().println(");"); } diff --git a/src/main/resources/verilog/DIG_PinControl.v b/src/main/resources/verilog/DIG_PinControl.v new file mode 100644 index 000000000..7c3ad712e --- /dev/null +++ b/src/main/resources/verilog/DIG_PinControl.v @@ -0,0 +1,26 @@ + 1) { + generics[0] := "Bits"; + export bitRange := "[(Bits-1):0] "; + export zval := "{Bits{1'bz}}"; + } + else { + moduleName = moduleName+"_BUS"; + export bitRange := ""; + export zval := "1'bz"; + } +?>module 1) { ?> +#( + parameter Bits = 2 +) +( + inout pin, + input oe, + input wr, + output rd +); + + assign pin = oe ? wr : ; + assign rd = oe ? wr : pin ; +endmodule diff --git a/src/test/java/de/neemann/digital/hdl/verilog2/VerilogSimulatorTest.java b/src/test/java/de/neemann/digital/hdl/verilog2/VerilogSimulatorTest.java index ab0840518..52e685038 100644 --- a/src/test/java/de/neemann/digital/hdl/verilog2/VerilogSimulatorTest.java +++ b/src/test/java/de/neemann/digital/hdl/verilog2/VerilogSimulatorTest.java @@ -14,6 +14,7 @@ import de.neemann.digital.draw.library.ElementNotFoundException; import de.neemann.digital.gui.Settings; import de.neemann.digital.hdl.model2.HDLException; import de.neemann.digital.hdl.printer.CodePrinter; +import de.neemann.digital.hdl.printer.CodePrinterStr; import de.neemann.digital.integration.FileScanner; import de.neemann.digital.integration.Resources; import de.neemann.digital.integration.TestExamples; @@ -42,13 +43,13 @@ public class VerilogSimulatorTest extends TestCase { /* public void testDebug() throws Exception { - File file = new File(Resources.getRoot(), "dig/test/vhdl/lut.dig"); + File file = new File(Resources.getRoot(), "/dig/test/vhdl/pinControl/simple.dig"); ToBreakRunner br = new ToBreakRunner(file); System.out.println(new VerilogGenerator(br.getLibrary(), new CodePrinterStr(true)).export(br.getCircuit())); checkVerilogExport(file); - }*/ + }/**/ public void testInSimulator() throws Exception { File examples = new File(Resources.getRoot(), "/dig/test/vhdl"); @@ -71,6 +72,19 @@ public class VerilogSimulatorTest extends TestCase { } } + /* + public void testInSimulatorInOut() throws Exception { + File examples = new File(Resources.getRoot(), "/dig/test/pinControl"); + try { + int tested = new FileScanner(this::checkVerilogExport).noOutput().scan(examples); + assertEquals(2, tested); + assertEquals(2, testBenches); + } catch (FileScanner.SkipAllException e) { + // if iverilog is not installed its also ok + } + }/**/ + + public void testDistributedInSimulator() throws Exception { File examples = new File(Resources.getRoot(), "../../main/dig/hdl"); try { diff --git a/src/test/java/de/neemann/digital/hdl/vhdl2/VHDLSimulatorTest.java b/src/test/java/de/neemann/digital/hdl/vhdl2/VHDLSimulatorTest.java index e04f3e47b..6692d588b 100644 --- a/src/test/java/de/neemann/digital/hdl/vhdl2/VHDLSimulatorTest.java +++ b/src/test/java/de/neemann/digital/hdl/vhdl2/VHDLSimulatorTest.java @@ -14,7 +14,6 @@ import de.neemann.digital.draw.library.ElementNotFoundException; import de.neemann.digital.gui.Settings; import de.neemann.digital.hdl.model2.HDLException; import de.neemann.digital.hdl.printer.CodePrinter; -import de.neemann.digital.hdl.printer.CodePrinterStr; import de.neemann.digital.integration.FileScanner; import de.neemann.digital.integration.Resources; import de.neemann.digital.integration.TestExamples; @@ -33,7 +32,7 @@ public class VHDLSimulatorTest extends TestCase { private static final String GHDL = System.getProperty("ghdl", "ghdl"); private int testBenches; - //* + /* public void testDebug() throws Exception { File file = new File(Resources.getRoot(), "/dig/test/pinControl/simple.dig"); @@ -64,6 +63,17 @@ public class VHDLSimulatorTest extends TestCase { } } + public void testInSimulatorInOut() throws Exception { + File examples = new File(Resources.getRoot(), "/dig/test/pinControl"); + try { + int tested = new FileScanner(this::checkVHDLExport).noOutput().scan(examples); + assertEquals(2, tested); + assertEquals(2, testBenches); + } catch (FileScanner.SkipAllException e) { + // if ghdl is not installed its also ok + } + } + public void testDistributedInSimulator() throws Exception { File examples = new File(Resources.getRoot(), "../../main/dig/hdl"); try { diff --git a/src/test/java/de/neemann/digital/integration/TestExamples.java b/src/test/java/de/neemann/digital/integration/TestExamples.java index d043be59c..569da6b51 100644 --- a/src/test/java/de/neemann/digital/integration/TestExamples.java +++ b/src/test/java/de/neemann/digital/integration/TestExamples.java @@ -43,8 +43,8 @@ public class TestExamples extends TestCase { */ public void testTestExamples() throws Exception { File examples = new File(Resources.getRoot(), "/dig/test"); - assertEquals(185, new FileScanner(this::check).scan(examples)); - assertEquals(173, testCasesInFiles); + assertEquals(186, new FileScanner(this::check).scan(examples)); + assertEquals(174, testCasesInFiles); } /** diff --git a/src/test/resources/dig/test/pinControl/uniTest.dig b/src/test/resources/dig/test/pinControl/uniTest.dig new file mode 100644 index 000000000..9aeac3ea6 --- /dev/null +++ b/src/test/resources/dig/test/pinControl/uniTest.dig @@ -0,0 +1,98 @@ + + + 1 + + + + In + + + Label + wr + + + + + + In + + + Label + oe + + + + + + PinControl + + + + + Out + + + rotation + + + + Label + rd + + + + + + Out + + + Label + pin + + + + + + Testcase + + + Testdata + + oe wr rd pin +1 0 0 0 +1 1 1 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file