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Check the circuit for errors before creating the hdl.

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This commit is contained in:
hneemann 2019-05-22 07:35:27 +02:00
parent ca665c86a6
commit d2785a9d9e
2 changed files with 12 additions and 2 deletions
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12
src/main/java/de/neemann/digital/toolchain/Configuration.java
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@ -8,11 +8,15 @@ package de.neemann.digital.toolchain;
import com.thoughtworks.xstream.XStream;
import com.thoughtworks.xstream.io.xml.StaxDriver;
import de.neemann.digital.builder.tt2.OSExecute;
import de.neemann.digital.core.NodeException;
import de.neemann.digital.core.element.Keys;
import de.neemann.digital.core.wiring.Clock;
import de.neemann.digital.draw.elements.Circuit;
import de.neemann.digital.draw.elements.PinException;
import de.neemann.digital.draw.elements.VisualElement;
import de.neemann.digital.draw.library.ElementLibrary;
import de.neemann.digital.draw.library.ElementNotFoundException;
import de.neemann.digital.draw.model.ModelCreator;
import de.neemann.digital.gui.SaveAsHelper;
import de.neemann.digital.gui.StatusInterface;
import de.neemann.digital.hdl.hgs.*;
@ -234,7 +238,13 @@ public final class Configuration {
return name;
}
private HDLModel writeHDL(String hdl, File digFile) throws IOException, HGSEvalException {
private HDLModel writeHDL(String hdl, File digFile) throws IOException, HGSEvalException, ElementNotFoundException, PinException, NodeException {
// Creates the simulation model to ensure the circuit is error free.
new ModelCreator(circuitProvider.getCurrentCircuit(), libraryProvider.getCurrentLibrary())
.createModel(false)
.close();
switch (hdl) {
case "verilog":
File verilogFile = SaveAsHelper.checkSuffix(digFile, "v");

2
src/test/java/de/neemann/digital/toolchain/ConfigurationTest.java
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@ -123,7 +123,7 @@ public class ConfigurationTest extends TestCase {
@Override
public void showError(Command command, Exception e) {
throw new RuntimeException(command.getName(), e);
fail(e.getMessage());
}
void clear() {