diff --git a/src/main/resources/lang/lang_en.xml b/src/main/resources/lang/lang_en.xml
index 0caa2df76..e2ef56305 100644
--- a/src/main/resources/lang/lang_en.xml
+++ b/src/main/resources/lang/lang_en.xml
@@ -23,8 +23,8 @@
Add
And
Break
- If the input of this Element becomes high, the fast forward clocking is stopped.
-You can use the element to implement a BRK assembly instruction.
+ If the input of this component becomes high, the fast forward clocking is stopped.
+You can use the component to implement a BRK assembly instruction.
Then you can execute the circuit to the next BRK instruction.
Button
Clock
@@ -95,7 +95,7 @@ So this gate can emulate every combinatorial gate.
RS_FF
Register
Reset
- The output of this element is hold down during the initialisation of the circuit.
+ The output of this component is hold down during the initialisation of the circuit.
After the circuit has stabilized the output goes up.
Seven-Seg
Seven-Seg-Hex
@@ -121,7 +121,7 @@ The terminal opens its own window.
The last pressed key, or null if no key is typed.
Error
D-flip-flop has no label set
- Pin {0} in element {1} is not a input or output
+ Pin {0} in component {1} is not a input or output
A single clock is necessary.
The circuit has no Inputs
The circuit has no outputs
@@ -132,9 +132,9 @@ The terminal opens its own window.
More then one output is active on a wire
Cannot analyse Node {0}
Contains [var] and [not var]
- Duplicate element {0}
- Pin {0} in element {1} exists twice
- Element {0} not found
+ Duplicate component {0}
+ Pin {0} in component {1} exists twice
+ Component {0} not found
Exact {0} variables necessary, not {1}
Flip-flop needs to be connected to the clock.
Invalid file format
@@ -145,8 +145,8 @@ The terminal opens its own window.
Net of pin {0} not found
No clock found in logic
No inputs available to set
- No shape found for Element {0}
- No value set for {0} at Element {1}
+ No shape found for component {0}
+ No value set for {0} at component {1}
Not all connected outputs have the same bit count
If multiple outputs are connected together, all of them have to be three-state outputs.
Logic not initialized
@@ -162,7 +162,7 @@ The terminal opens its own window.
To manny outputs defined
Pin not present
Found a pin without a name in {0}
- Pin {0} not found at Element {1}
+ Pin {0} not found at component {1}
Pin {0} not found
Pin {0} unknown
Read of high Z value
@@ -211,7 +211,7 @@ To analyse you can run the circuit in single gate step mode.
Signed
Value
Width
- With of symbol if this circuit is used in an element ins an other circuit.
+ With of symbol if this circuit is used as an component in an other circuit.
Reload at model start
Reloads the hex file every time the model is started.
Flip selector position
@@ -253,8 +253,8 @@ To analyse you can run the circuit in single gate step mode.
Analyses the actual circuit
Copy
Custom
- Delete elements
- Delete selected single element or group of elements
+ Delete components
+ Delete selected single component or group of components.
Edit
Edit circuit attributes
These attributes effect the behavior if the circuit is included in other circuits.
@@ -262,20 +262,20 @@ To analyse you can run the circuit in single gate step mode.
Settings used to start the simulation
Settings
Edits Digitals Preferences
- Edit Elements
- Edits the circuit. Moves a single Element or edits its properties
- Elements
+ Edit components
+ Edits the circuit. Moves a single component or edits its properties.
+ Components
Export
Export PNG large
Export PNG small
Export SVG
Export SVG+LaTeX
Run Fast
- Runs the circuit until a break is detected by the BRK element.
+ Runs the circuit until a break is detected by the BRK component.
File
Help
Import
- Imports a circuit as a useable Element!
+ Imports a circuit as a usable component!
Fit to window
Single gate stepping
Runs the circuit in single gate step mode