diff --git a/src/main/resources/lang/lang_en.xml b/src/main/resources/lang/lang_en.xml
index 57fe18f88..807281f2d 100644
--- a/src/main/resources/lang/lang_en.xml
+++ b/src/main/resources/lang/lang_en.xml
@@ -808,7 +808,7 @@
     <string name="err_breakTimeOut">Break timeout after {0} cycles</string>
     <string name="err_builder_exprNotSupported">Expression {0} not supported</string>
     <string name="err_builder_operationNotSupported">Operation {0} not supported</string>
-    <string name="err_burnError">More then one output is active on a wire, causing a short circuit.</string>
+    <string name="err_burnError">More than one output is active on a wire, causing a short circuit.</string>
     <string name="err_pullUpAndDown">It is not allowed to connect a pull-up and pull-down resistor to the same net.</string>
     <string name="err_cannotAnalyse_N">Cannot analyse Node {0}</string>
     <string name="err_containsVarAndNotVar">Contains [var] and [not var]</string>
@@ -963,7 +963,7 @@
     <string name="err_clocksNotAllowedInAsyncMode">Clock elements can not be used in asynchronous mode.</string>
     <string name="err_verilogExporting">Error during export to Verilog.</string>
     <string name="err_noRomFound">No program memory found! The program memory needs to be flagged as such.</string>
-    <string name="err_moreThenOneRomFound">More then one program memories found! Only one program memory must be flages as such.</string>
+    <string name="err_moreThenOneRomFound">More than one program memories found! Only one program memory must be flages as such.</string>
     <string name="err_errorLoadingRomData">Error loading the program memory.</string>
     <string name="err_parsingSVG">Error while reading the SVG file.</string>
     <string name="err_morePinsDefinedInSVGAsNeeded">The SVG file contains pins that do not exist in the circuit.</string>