hneemann 61d5922a76 restricted nested editing

2016-03-28 09:49:36 +02:00

src

restricted nested editing

2016-03-28 09:49:36 +02:00

.gitignore

initial commit

2016-03-11 23:16:40 +01:00

pom.xml

renamed jar file

2016-03-28 09:25:56 +02:00

sun_checks_neemann.xml

added a pin direction

2016-03-14 21:59:45 +01:00

Description

A digital logic designer and circuit simulator.

circuitdigital-circuitseducationlogiclogic-gateslogisimsimulator

GPL-3.0 48 MiB

Languages

Java 98.6%

Verilog 0.5%

Assembly 0.4%

XSLT 0.4%