mirror of
https://github.com/johnwinans/rvalp.git
synced 2025-09-27 13:12:03 -04:00
Add ribbon diagrams to tri-fold refcard
Change refcard boolean operators for better readability
This commit is contained in:
John Winans
parent
608f242525
commit
23bd3addb1
@ -482,8 +482,7 @@
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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% #1 the binary encoding
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\newcommand\DrawInsnTypeRTikz[1]{
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\BeginTikzPicture
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\newcommand\DrawInsnTypeR[1]{
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\StrLen{#1}[\numchars]
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\DrawInsnBitstring{\numchars}{#1}{\hyperref[insnformat:rtype]{R-type}}
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\DrawInsnBoxSeg{\numchars}{31}{25}{funct7}
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@ -494,6 +493,13 @@
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\DrawInsnBoxSeg{\numchars}{6}{0}{opcode}
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\DrawHexMarkers{\numchars}
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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% #1 the binary encoding
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\newcommand\DrawInsnTypeRTikz[1]{
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\BeginTikzPicture
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\DrawInsnTypeR{#1}
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\EndTikzPicture
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}
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@ -1201,7 +1207,7 @@
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\newcommand\GCInsnMnemonicPosX{0} % the template instruction source
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\newcommand\GCInsnDescriptionPosX{13} % the long-form description
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\newcommand\GCInsnRTLPosX{29.7} % the detailed RTL description
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\newcommand\GCInsnTypePosX{52} % R,I,U,B,...
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\newcommand\GCInsnTypePosX{52.5} % R,I,U,B,...
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\newcommand\GCInsnEncodingPosX{53} % the box, sans-castle
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% #1 opcode
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@ -1211,7 +1217,7 @@
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% #5 RTL
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\newcommand\DrawGCInsnOpU[5]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#2}{#3}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{U};
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\draw(\GCInsnTypePosX,.75) node {U};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#4};
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\draw(\GCInsnRTLPosX,.6) node[right]{#5};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpUBox{imm[31:12]}{rd}{#1}\end{scope}
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@ -1224,7 +1230,7 @@
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% #5 RTL
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\newcommand\DrawGCInsnOpJ[5]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#2}{#3}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{J};
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\draw(\GCInsnTypePosX,.75) node {J};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#4};
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\draw(\GCInsnRTLPosX,.6) node[right]{#5};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpJBox{imm[20\textbar10:1\textbar11\textbar19:12]}{rd}{#1}\end{scope}
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@ -1238,7 +1244,7 @@
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% #6 RTL
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\newcommand\DrawGCInsnOpI[6]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#3}{#4}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{I};
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\draw(\GCInsnTypePosX,.75) node {I};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#5};
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\draw(\GCInsnRTLPosX,.6) node[right]{#6};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpIBox{imm[11:0]}{rs1}{#1}{rd}{#2}\end{scope}
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@ -1253,7 +1259,7 @@
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% #7 RTL
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\newcommand\DrawGCInsnOpIShift[7]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#4}{#5}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{I};
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\draw(\GCInsnTypePosX,.75) node {I};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#6};
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\draw(\GCInsnRTLPosX,.6) node[right]{#7};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpIFunctBox{#1}{shamt}{rs1}{#2}{rd}{#3}\end{scope}
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@ -1268,7 +1274,7 @@
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% #7 RTL
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\newcommand\DrawGCInsnOpICSR[7]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#3}{#4}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{I};
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\draw(\GCInsnTypePosX,.75) node {I};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#6};
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\draw(\GCInsnRTLPosX,.6) node[right]{#7};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpIBox{csr[11:0]}{#5}{#1}{rd}{#2}\end{scope}
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@ -1282,7 +1288,7 @@
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% #6 RTL
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\newcommand\DrawGCInsnOpB[6]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#3}{#4}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{B};
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\draw(\GCInsnTypePosX,.75) node {B};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#5};
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\draw(\GCInsnRTLPosX,.6) node[right]{#6};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpBBox{imm[12\textbar10:5]}{rs2}{rs1}{#1}{imm[4:1\textbar11]}{#2}\end{scope}
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@ -1296,7 +1302,7 @@
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% #6 RTL
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\newcommand\DrawGCInsnOpS[6]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#3}{#4}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{S};
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\draw(\GCInsnTypePosX,.75) node {S};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#5};
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\draw(\GCInsnRTLPosX,.6) node[right]{#6};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpBBox{imm[11:5]}{rs2}{rs1}{#1}{imm[4:0]}{#2}\end{scope}
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@ -1311,7 +1317,7 @@
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% #7 RTL
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\newcommand\DrawGCInsnOpR[7]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#4}{#5}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{R};
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\draw(\GCInsnTypePosX,.75) node {R};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#6};
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\draw(\GCInsnRTLPosX,.6) node[right]{#7};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpRBox{#3}{rs2}{rs1}{#2}{rd}{#1}\end{scope}
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@ -1323,7 +1329,7 @@
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% #4 description
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\newcommand\DrawGCInsnOpSys[4]{
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\begin{scope}[shift={(\GCInsnMnemonicPosX,.6)}]\DrawInsnSrc{#3}{}\end{scope}
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\draw(\GCInsnTypePosX,.75) node[right]{I};
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\draw(\GCInsnTypePosX,.75) node {I};
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\draw(\GCInsnDescriptionPosX,.6) node[right]{#4};
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% \draw(\GCInsnRTLPosX,.6) node[right]{#4};
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\begin{scope}[shift={(\GCInsnEncodingPosX,0)}]\DrawInsnOpIBinBox{#20000000000000#1}\end{scope}
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@ -1340,7 +1346,7 @@
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\newcommand\DrawGCAllInsnOpsJAL{
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\begin{scope}[shift={(0,0)}]\DrawGCInsnOpJ{1101111}{jal}{rd,pcrel\_21}{Jump And Link}{\tt rd $\leftarrow$ pc+4, pc $\leftarrow$ pc+imm\_j}\end{scope}
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\begin{scope}[shift={(0,-1.5)}]\DrawGCInsnOpI{1100111}{000}{jalr}{rd,imm(rs1)}{Jump And Link Register}{\tt rd $\leftarrow$ pc+4, pc $\leftarrow$ (rs1+imm\_i) \& \textasciitilde{}1}\end{scope}
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\begin{scope}[shift={(0,-1.5)}]\DrawGCInsnOpI{1100111}{000}{jalr}{rd,imm(rs1)}{Jump And Link Register}{\tt rd $\leftarrow$ pc+4, pc $\leftarrow$ (rs1+imm\_i) $\land$ $\sim$1}\end{scope}
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}
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\newcommand\DrawGCAllInsnOpsBranch{
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@ -1363,9 +1369,9 @@
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\begin{scope}[shift={(0,0)}]\DrawGCInsnOpI{0010011}{000}{addi}{rd,rs1,imm}{Add Immediate}{\tt rd $\leftarrow$ rs1 + imm\_i, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-1.5)}]\DrawGCInsnOpI{0010011}{010}{slti}{rd,rs1,imm}{Set Less Than Immediate}{\tt rd $\leftarrow$ (rs1 < imm\_i) ?\ 1 :\ 0, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-3.0)}]\DrawGCInsnOpI{0010011}{011}{sltiu}{rd,rs1,imm}{Set Less Than Immediate Unsigned}{\tt rd $\leftarrow$ (rs1 < imm\_i) ?\ 1 :\ 0, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-4.5)}]\DrawGCInsnOpI{0010011}{100}{xori}{rd,rs1,imm}{Exclusive Or Immediate}{\tt rd $\leftarrow$ rs1 \^{} imm\_i, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-6.0)}]\DrawGCInsnOpI{0010011}{110}{ori}{rd,rs1,imm}{Or Immediate}{\tt rd $\leftarrow$ rs1 | imm\_i, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-7.5)}]\DrawGCInsnOpI{0010011}{111}{andi}{rd,rs1,imm}{And Immediate}{\tt rd $\leftarrow$ rs1 \& imm\_i, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-4.5)}]\DrawGCInsnOpI{0010011}{100}{xori}{rd,rs1,imm}{Exclusive Or Immediate}{\tt rd $\leftarrow$ rs1 $\oplus$ imm\_i, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-6.0)}]\DrawGCInsnOpI{0010011}{110}{ori}{rd,rs1,imm}{Or Immediate}{\tt rd $\leftarrow$ rs1 $\lor$ imm\_i, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-7.5)}]\DrawGCInsnOpI{0010011}{111}{andi}{rd,rs1,imm}{And Immediate}{\tt rd $\leftarrow$ rs1 $\land$ imm\_i, pc $\leftarrow$ pc+4}\end{scope}
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}
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% note that the S-Type insns have the same field-format as the B-type
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@ -1381,20 +1387,20 @@
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\begin{scope}[shift={(0,-3.0)}]\DrawGCInsnOpR{0110011}{001}{0000000}{sll}{rd,rs1,rs2}{Shift Left Logical}{\tt rd $\leftarrow$ rs1 << (rs2\%XLEN), pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-4.5)}]\DrawGCInsnOpR{0110011}{010}{0000000}{slt}{rd,rs1,rs2}{Set Less Than}{\tt rd $\leftarrow$ (rs1 < rs2) ?\ 1 :\ 0, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-6.0)}]\DrawGCInsnOpR{0110011}{011}{0000000}{sltu}{rd,rs1,rs2}{Set Less Than Unsigned}{\tt rd $\leftarrow$ (rs1 < rs2) ?\ 1 :\ 0, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-7.5)}]\DrawGCInsnOpR{0110011}{100}{0000000}{xor}{rd,rs1,rs2}{Exclusive Or}{\tt rd $\leftarrow$ rs1 \^{} rs2, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-7.5)}]\DrawGCInsnOpR{0110011}{100}{0000000}{xor}{rd,rs1,rs2}{Exclusive Or}{\tt rd $\leftarrow$ rs1 $\oplus$ rs2, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-9.0)}]\DrawGCInsnOpR{0110011}{101}{0000000}{srl}{rd,rs1,rs2}{Shift Right Logical}{\tt rd $\leftarrow$ rs1 >> (rs2\%XLEN), pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-10.5)}]\DrawGCInsnOpR{0110011}{101}{0100000}{sra}{rd,rs1,rs2}{Shift Right Arithmetic}{\tt rd $\leftarrow$ rs1 >> (rs2\%XLEN), pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-12.0)}]\DrawGCInsnOpR{0110011}{110}{0000000}{or}{rd,rs1,rs2}{Or}{\tt rd $\leftarrow$ rs1 | rs2, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-13.5)}]\DrawGCInsnOpR{0110011}{111}{0000000}{and}{rd,rs1,rs2}{And}{\tt rd $\leftarrow$ rs1 \& rs2, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-12.0)}]\DrawGCInsnOpR{0110011}{110}{0000000}{or}{rd,rs1,rs2}{Or}{\tt rd $\leftarrow$ rs1 $\lor$ rs2, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-13.5)}]\DrawGCInsnOpR{0110011}{111}{0000000}{and}{rd,rs1,rs2}{And}{\tt rd $\leftarrow$ rs1 $\land$ rs2, pc $\leftarrow$ pc+4}\end{scope}
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}
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\newcommand\DrawGCAllInsnOpsSystem{
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\begin{scope}[shift={(0,0)}]\DrawGCInsnOpICSR{1110011}{001}{csrrw}{rd,csr,rs1}{rs1}{Atomic Read/Write}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ rs1, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-1.5)}]\DrawGCInsnOpICSR{1110011}{010}{csrrs}{rd,csr,rs1}{rs1}{Atomic Read and Set Bits}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr | rs1, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-3.0)}]\DrawGCInsnOpICSR{1110011}{011}{csrrc}{rd,csr,rs1}{rs1}{Atomic Read and Clear}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr \& \textasciitilde{}rs1, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-1.5)}]\DrawGCInsnOpICSR{1110011}{010}{csrrs}{rd,csr,rs1}{rs1}{Atomic Read and Set}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr $\lor$ rs1, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-3.0)}]\DrawGCInsnOpICSR{1110011}{011}{csrrc}{rd,csr,rs1}{rs1}{Atomic Read and Clear}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr $\land$ $\sim$rs1, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-4.5)}]\DrawGCInsnOpICSR{1110011}{101}{csrrwi}{rd,csr,zimm}{zimm[4:0]}{Atomic Read/Write Immediate}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ zimm, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-6.0)}]\DrawGCInsnOpICSR{1110011}{110}{csrrsi}{rd,csr,zimm}{zimm[4:0]}{Atomic Read and Set Immediate}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr | zimm, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-7.5)}]\DrawGCInsnOpICSR{1110011}{111}{csrrci}{rd,csr,zimm}{zimm[4:0]}{Atomic Read and Clear Immediate}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr \& \textasciitilde{}zimm, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-6.0)}]\DrawGCInsnOpICSR{1110011}{110}{csrrsi}{rd,csr,zimm}{zimm[4:0]}{Atomic Read and Set Immediate}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr $\lor$ zimm, pc $\leftarrow$ pc+4}\end{scope}
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\begin{scope}[shift={(0,-7.5)}]\DrawGCInsnOpICSR{1110011}{111}{csrrci}{rd,csr,zimm}{zimm[4:0]}{Atomic Read and Clear Immediate}{\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr $\land$ $\sim$zimm, pc $\leftarrow$ pc+4}\end{scope}
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}
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\newcommand\DrawGCAllInsnOpsSim{
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@ -1408,6 +1414,24 @@
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\begin{scope}[shift={(0,-3.0)}]\DrawGCInsnOpIShift{0010011}{101}{0100000}{srai}{rd,rs1,shamt}{Shift Right Arithmetic Immediate}{\tt rd $\leftarrow$ rs1 >> shamt\_i, pc $\leftarrow$ pc+4}\end{scope}
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}
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\newcommand\DrawGCAllInsnOpsPseudo{
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\draw(0, 0) node[right]{p1};
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\draw(0, -1.5) node[right]{p1};
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\draw(0, -3.0) node[right]{p1};
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\draw(0, -4.5) node[right]{p1};
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\draw(0, -6.0) node[right]{p1};
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\draw(0, -7.5) node[right]{p1};
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\draw(0, -9.0) node[right]{p1};
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\draw(0,-10.5) node[right]{p1};
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\draw(0,-12.0) node[right]{p1};
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\draw(0,-13.5) node[right]{p1};
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\draw(0,-15.0) node[right]{p1};
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\draw(0,-16.5) node[right]{p1};
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\draw(0,-18.0) node[right]{p1};
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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% a color to hilight the rows on the card
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\definecolor{GCBarColorBG}{RGB}{200,255,200}
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\definecolor{GCBarColorFG}{RGB}{128,220,128}
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@ -1437,7 +1461,7 @@
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\draw node at (\GCInsnMnemonicPosX+6,2.75) {\small Instruction};
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\draw node at (\GCInsnDescriptionPosX+8,2.75) {\small Description};
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\draw node at (\GCInsnRTLPosX+12,2.75) {\small Operation};
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\draw node at (\GCInsnTypePosX+1,2.25) {\small Type};
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\draw node at (\GCInsnTypePosX,2.75) {\small Type};
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%\node [draw, rotate=90] at (0,60) {\small RV32I Reference Card (\href{https://github.com/johnwinans/rvalp}{https://github.com/johnwinans/rvalp})};
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%\draw node[rotate=90,right] at (\GCPageWidth+.7,-66) {\small RV32I Reference Card};
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@ -1457,6 +1481,13 @@
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\begin{scope}[shift={(0,-55.5)}]\DrawGCAllInsnOpsSim\end{scope}
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\begin{scope}[shift={(0,-58.5)}]\DrawGCAllInsnOpsSystem\end{scope}
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% stub in some space for pseudo-instruictions to see what it might look like
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%\begin{scope}[shift={(0,-67)}]\DrawGCAllInsnOpsPseudo\end{scope}
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% show markers to indicate where to fold it
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\draw [line width=.1mm,draw=GCSlugColorFG] (29.5,1) -- (29.5, 1.5);
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\draw [line width=.1mm,draw=GCSlugColorFG] (29.5,-65.5) -- (29.5, -66);
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\EndTikzPicture
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}
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@ -1510,8 +1541,17 @@
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\newcommand\BitBoxArrowHeadInset{-16.7-\BitBoxArrowTailInset}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\newcommand\DrawInsnOpJTypeDecoding{
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\BeginTikzPicture
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% special case for R type instructions for consistency
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\newcommand\InsnOpRTypeDecoding{
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\begin{scope}[shift={(0,-1.5)}]
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\DrawInsnTypeR{abcdefghijklmnopqrstuvwxy1101111}
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\end{scope}
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\newcommand\InsnOpJTypeDecoding{
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\begin{scope}[shift={(0,-1.5)}]
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@ -1585,13 +1625,16 @@
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\InsnBoxFieldWidthArrow{10}{1}
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\InsnBoxFieldWidthArrow{0}{0}
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\end{scope}
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}
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\newcommand\DrawInsnOpJTypeDecoding{
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\BeginTikzPicture
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\InsnOpJTypeDecoding
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\EndTikzPicture
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\newcommand\DrawInsnOpBTypeDecoding{
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\BeginTikzPicture
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\newcommand\InsnOpBTypeDecoding{
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\begin{scope}[shift={(0,-1.5)}]
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@ -1667,13 +1710,16 @@
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\InsnBoxFieldWidthArrow{4}{1}
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\InsnBoxFieldWidthArrow{0}{0}
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\end{scope}
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}
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\newcommand\DrawInsnOpBTypeDecoding{
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\BeginTikzPicture
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\InsnOpBTypeDecoding
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\EndTikzPicture
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\newcommand\DrawInsnOpSTypeDecoding{
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\BeginTikzPicture
|
||||
\newcommand\InsnOpSTypeDecoding{
|
||||
|
||||
\begin{scope}[shift={(0,-1.5)}]
|
||||
|
||||
@ -1737,13 +1783,16 @@
|
||||
\InsnBoxFieldWidthArrow{11}{5}
|
||||
\InsnBoxFieldWidthArrow{4}{0}
|
||||
\end{scope}
|
||||
}
|
||||
|
||||
\newcommand\DrawInsnOpSTypeDecoding{
|
||||
\BeginTikzPicture
|
||||
\InsnOpSTypeDecoding
|
||||
\EndTikzPicture
|
||||
}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
\newcommand\DrawInsnOpITypeDecoding{
|
||||
\BeginTikzPicture
|
||||
\newcommand\InsnOpITypeDecoding{
|
||||
|
||||
\begin{scope}[shift={(0,-1.5)}]
|
||||
|
||||
@ -1804,13 +1853,16 @@
|
||||
\InsnBoxFieldWidthArrow{31}{12}
|
||||
\InsnBoxFieldWidthArrow{11}{0}
|
||||
\end{scope}
|
||||
}
|
||||
|
||||
\newcommand\DrawInsnOpITypeDecoding{
|
||||
\BeginTikzPicture
|
||||
\InsnOpITypeDecoding
|
||||
\EndTikzPicture
|
||||
}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
\newcommand\DrawInsnOpIShiftTypeDecoding{
|
||||
\BeginTikzPicture
|
||||
\newcommand\InsnOpIShiftTypeDecoding{
|
||||
|
||||
\begin{scope}[shift={(0,-1.5)}]
|
||||
|
||||
@ -1889,16 +1941,19 @@
|
||||
|
||||
\InsnBoxFieldWidthArrow{0}{0}
|
||||
\end{scope}
|
||||
}
|
||||
|
||||
\newcommand\DrawInsnOpIShiftTypeDecoding{
|
||||
\BeginTikzPicture
|
||||
\InsnOpIShiftTypeDecoding
|
||||
\EndTikzPicture
|
||||
}
|
||||
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
\newcommand\DrawInsnOpUTypeDecoding{
|
||||
\BeginTikzPicture
|
||||
\newcommand\InsnOpUTypeDecoding{
|
||||
|
||||
\begin{scope}[shift={(0,-1.5)}]
|
||||
|
||||
\DrawInsnTypeU{abcdefghijklmnopqrst001010110111}
|
||||
|
||||
\pgfmathsetmacro\ArrowNorth{\BitBoxArrowTailInset}
|
||||
@ -1957,10 +2012,30 @@
|
||||
\InsnBoxFieldWidthArrow{31}{12}
|
||||
\InsnBoxFieldWidthArrow{11}{0}
|
||||
\end{scope}
|
||||
|
||||
}
|
||||
\newcommand\DrawInsnOpUTypeDecoding{
|
||||
\BeginTikzPicture
|
||||
\InsnOpUTypeDecoding
|
||||
\EndTikzPicture
|
||||
}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
% Draw all the ribbons in a stack for a reference card
|
||||
\newcommand\DrawInsnRibbons{
|
||||
\BeginTikzPicture
|
||||
\begin{scope}[yscale=.75]
|
||||
\begin{scope}[shift={(0,0)}]\InsnOpUTypeDecoding\end{scope}
|
||||
\begin{scope}[shift={(0,-25)}]\InsnOpITypeDecoding\end{scope}
|
||||
\begin{scope}[shift={(0,-50)}]\InsnOpIShiftTypeDecoding\end{scope}
|
||||
\begin{scope}[shift={(0,-75)}]\InsnOpSTypeDecoding\end{scope}
|
||||
\begin{scope}[shift={(0,-100)}]\InsnOpBTypeDecoding\end{scope}
|
||||
\begin{scope}[shift={(0,-125)}]\InsnOpJTypeDecoding\end{scope}
|
||||
\begin{scope}[shift={(0,-150)}]\InsnOpRTypeDecoding\end{scope}
|
||||
\end{scope}
|
||||
\EndTikzPicture
|
||||
}
|
||||
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
\chapter{RV32I Reference Card}%
|
||||
\chapter{RV32I Reference Cards}%
|
||||
\nolinenumbers%
|
||||
\vspace{-1cm}
|
||||
{\small%
|
||||
@ -11,9 +11,9 @@ add & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:add]{Ad
|
||||
\hline
|
||||
addi & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:addi]{Add Immediate} & {\tt rd $\leftarrow$ rs1 + \hyperref[imm.i:decode]{imm\_i}, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
and & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:and]{And} & {\tt rd $\leftarrow$ rs1 \& rs2, pc $\leftarrow$ pc+4}\\
|
||||
and & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:and]{And} & {\tt rd $\leftarrow$ rs1 $\land$ rs2, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
andi & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:andi]{And Immediate} & {\tt rd $\leftarrow$ rs1 \& \hyperref[imm.i:decode]{imm\_i}, pc $\leftarrow$ pc+4}\\
|
||||
andi & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:andi]{And Immediate} & {\tt rd $\leftarrow$ rs1 $\land$ \hyperref[imm.i:decode]{imm\_i}, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
auipc & rd, imm & \hyperref[insnformat:utype]{U} & \hyperref[insn:auipc]{Add Upper Immediate to PC} & {\tt rd $\leftarrow$ pc + \hyperref[imm.u:decode]{imm\_u}, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
@ -31,15 +31,15 @@ bne & rs1, rs2, \hyperref[pcrel.13]{pcrel\_13} & \hyperref[insnformat:btype]{B
|
||||
\hline
|
||||
csrrw & rd, csr, rs1 & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrw]{Atomic Read/Write} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ rs1, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
csrrs & rd, csr, rs1 & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrs]{Atomic Read and Set Bits} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr | rs1, pc $\leftarrow$ pc+4}\\
|
||||
csrrs & rd, csr, rs1 & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrs]{Atomic Read and Set} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr $\lor$ rs1, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
csrrc & rd, csr, rs1 & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrc]{Atomic Read and Clear} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr \& \textasciitilde{}rs1, pc $\leftarrow$ pc+4}\\
|
||||
csrrc & rd, csr, rs1 & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrc]{Atomic Read and Clear} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr $\land$ $\sim$rs1, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
csrrwi & rd, csr, zimm & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrwi]{Atomic Read/Write Immediate} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ zimm, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
csrrsi & rd, csr, zimm & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrsi]{Atomic Read and Set Immediate} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr | zimm, pc $\leftarrow$ pc+4}\\
|
||||
csrrsi & rd, csr, zimm & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrsi]{Atomic Read and Set Immediate} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr $\lor$ zimm, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
csrrci & rd, csr, zimm & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrci]{Atomic Read and Clear Immediate} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr \& \textasciitilde{}zimm, pc $\leftarrow$ pc+4}\\
|
||||
csrrci & rd, csr, zimm & \hyperref[insnformat:itype]{I} & \hyperref[insn:csrrci]{Atomic Read and Clear Immediate} & {\tt rd $\leftarrow$ csr, csr $\leftarrow$ csr $\land$ $\sim$zimm, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
ecall & & \hyperref[insnformat:itype]{I} & \hyperref[insn:ecall]{Environment Call} & Transfer Control to Debugger \\
|
||||
\hline
|
||||
@ -47,7 +47,7 @@ ebreak & & \hyperref[insnformat:itype]{I} & \hyperref[insn:ebreak]{Environment B
|
||||
\hline
|
||||
jal & rd, \hyperref[pcrel.21]{pcrel\_21} & \hyperref[insnformat:jtype]{J} & \hyperref[insn:jal]{Jump And Link} & {\tt rd $\leftarrow$ pc+4, pc $\leftarrow$ pc+\hyperref[imm.j:decode]{imm\_j}}\\
|
||||
\hline
|
||||
jalr & rd, imm(rs1) & \hyperref[insnformat:itype]{I} & \hyperref[insn:jalr]{Jump And Link Register} & {\tt rd $\leftarrow$ pc+4, pc $\leftarrow$ (rs1+\hyperref[imm.i:decode]{imm\_i}) \& \textasciitilde{}1}\\
|
||||
jalr & rd, imm(rs1) & \hyperref[insnformat:itype]{I} & \hyperref[insn:jalr]{Jump And Link Register} & {\tt rd $\leftarrow$ pc+4, pc $\leftarrow$ (rs1+\hyperref[imm.i:decode]{imm\_i}) \& $\sim$1}\\
|
||||
\hline
|
||||
lb & rd, imm(rs1) & \hyperref[insnformat:itype]{I} & \hyperref[insn:lb]{Load Byte} & {\tt rd $\leftarrow$ \hyperref[extension:sx]{sx}(\hyperref[memory:m8]{m8}(rs1+\hyperref[imm.i:decode]{imm\_i})), pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
@ -61,9 +61,9 @@ lui & rd, imm & \hyperref[insnformat:utype]{U} & \hyperref[insn:lui]{Lo
|
||||
\hline
|
||||
lw & rd, imm(rs1) & \hyperref[insnformat:itype]{I} & \hyperref[insn:lw]{Load Word} & {\tt rd $\leftarrow$ \hyperref[extension:sx]{sx}(\hyperref[memory:m32]{m32}(rs1+\hyperref[imm.i:decode]{imm\_i})), pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
or & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:or]{Or} & {\tt rd $\leftarrow$ rs1 | rs2, pc $\leftarrow$ pc+4}\\
|
||||
or & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:or]{Or} & {\tt rd $\leftarrow$ rs1 $\lor$ rs2, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
ori & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:ori]{Or Immediate} & {\tt rd $\leftarrow$ rs1 | \hyperref[imm.i:decode]{imm\_i}, pc $\leftarrow$ pc+4}\\
|
||||
ori & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:ori]{Or Immediate} & {\tt rd $\leftarrow$ rs1 $\lor$ \hyperref[imm.i:decode]{imm\_i}, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
sb & rs2, imm(rs1) & \hyperref[insnformat:stype]{S} & \hyperref[insn:sb]{Store Byte} & {\tt \hyperref[memory:m8]{m8}(rs1+\hyperref[imm.s:decode]{imm\_s}) $\leftarrow$ rs2[7:0], pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
@ -73,13 +73,13 @@ sll & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sll]{Sh
|
||||
\hline
|
||||
slli & rd, rs1, shamt & \hyperref[insnformat:itype]{I} & \hyperref[insn:slli]{Shift Left Logical Immediate} & {\tt rd $\leftarrow$ rs1 << \hyperref[shamt.i:decode]{shamt\_i}, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
slt & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:slt]{Set Less Than} & {\tt rd $\leftarrow$ (rs1 < rs2) ? 1 : 0, pc $\leftarrow$ pc+4}\\
|
||||
slt & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:slt]{Set Less Than} & {\tt rd $\leftarrow$ (rs1 < rs2) ?\ 1 :\ 0, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
slti & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:slti]{Set Less Than Immediate} & {\tt rd $\leftarrow$ (rs1 < \hyperref[imm.i:decode]{imm\_i}) ? 1 : 0, pc $\leftarrow$ pc+4}\\
|
||||
slti & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:slti]{Set Less Than Immediate} & {\tt rd $\leftarrow$ (rs1 < \hyperref[imm.i:decode]{imm\_i}) ?\ 1 :\ 0, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
sltiu & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:sltiu]{Set Less Than Immediate Unsigned} & {\tt rd $\leftarrow$ (rs1 < \hyperref[imm.i:decode]{imm\_i}) ? 1 : 0, pc $\leftarrow$ pc+4}\\
|
||||
sltiu & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:sltiu]{Set Less Than Immediate Unsigned} & {\tt rd $\leftarrow$ (rs1 < \hyperref[imm.i:decode]{imm\_i}) ?\ 1 :\ 0, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
sltu & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sltu]{Set Less Than Unsigned} & {\tt rd $\leftarrow$ (rs1 < rs2) ? 1 : 0, pc $\leftarrow$ pc+4}\\
|
||||
sltu & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sltu]{Set Less Than Unsigned} & {\tt rd $\leftarrow$ (rs1 < rs2) ?\ 1 :\ 0, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
sra & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sra]{Shift Right Arithmetic} & {\tt rd $\leftarrow$ rs1 >> (rs2\%\hyperref[XLEN]{XLEN}), pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
@ -93,9 +93,9 @@ sub & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sub]{Su
|
||||
\hline
|
||||
sw & rs2, imm(rs1) & \hyperref[insnformat:stype]{S} & \hyperref[insn:sw]{Store Word} & {\tt \hyperref[memory:m32]{m32}(rs1+\hyperref[imm.s:decode]{imm\_s}) $\leftarrow$ rs2[31:0], pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
xor & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:xor]{Exclusive Or} & {\tt rd $\leftarrow$ rs1 \^{} rs2, pc $\leftarrow$ pc+4}\\
|
||||
xor & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:xor]{Exclusive Or} & {\tt rd $\leftarrow$ rs1 $\oplus$ rs2, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
xori & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:xori]{Exclusive Or Immediate} & {\tt rd $\leftarrow$ rs1 \^{} \hyperref[imm.i:decode]{imm\_i}, pc $\leftarrow$ pc+4}\\
|
||||
xori & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:xori]{Exclusive Or Immediate} & {\tt rd $\leftarrow$ rs1 $\oplus$ \hyperref[imm.i:decode]{imm\_i}, pc $\leftarrow$ pc+4}\\
|
||||
\hline
|
||||
\end{tabular}
|
||||
}%
|
||||
@ -110,5 +110,13 @@ xori & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:xori]{Ex
|
||||
\newgeometry{left=0in,width=8in,height=10.5in,vmargin=0in,hmargin=0in,layouthoffset=1.35in,layoutvoffset=1in}%
|
||||
%\resizebox{8in}{!}{\rotatebox{90}{\DrawAllInsnOps}}
|
||||
%\resizebox{8in}{!}{\rotatebox{90}{\DrawGCAllInsnOps}}
|
||||
\resizebox{8in}{10.75in}{\rotatebox{90}{\DrawGCAllInsnOps}}
|
||||
\resizebox{8in}{10.7in}{\rotatebox{90}{\DrawGCAllInsnOps}}
|
||||
|
||||
\newpage%
|
||||
\thispagestyle{empty}%
|
||||
\resizebox{8in}{!}{
|
||||
\rotatebox{-90}{
|
||||
\DrawInsnRibbons
|
||||
}
|
||||
}
|
||||
\restoregeometry
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user