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Merge pull request #7 from vazhnov/Fix_typo_register
Fix a typo in chapter "4.2.4 Adding a 12-bit Signed Value": t1 → t0
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@ -173,7 +173,7 @@ For example, to set \reg{t3} to zero:
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{\small
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\begin{verbatim}
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addi t0, zero, 4 # t0 = 4
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addi t1, t1, 100 # t1 = 104
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addi t0, t0, 100 # t0 = 104
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addi t0, zero, 0x123 # t0 = 0x123
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addi t0, t0, 0xfff # t0 = 0x122 (subtract 1)
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