From 9c16b6e3423c9a7968b3d2165416420bd26b818e Mon Sep 17 00:00:00 2001 From: John Winans Date: Fri, 4 May 2018 00:01:11 -0500 Subject: [PATCH] Added an introdution. --- book/book.tex | 2 +- book/glossary.tex | 26 +++++++++ book/intro/chapter.tex | 116 ++++++++++++++++++++++++++++++++++++++++- 3 files changed, 142 insertions(+), 2 deletions(-) diff --git a/book/book.tex b/book/book.tex index c5feafc..086ca28 100644 --- a/book/book.tex +++ b/book/book.tex @@ -58,7 +58,7 @@ %\part{Introduction} -%\include{intro/chapter} +\include{intro/chapter} \include{numbers/chapter} \include{toolchain/chapter} \include{rv32/chapter} diff --git a/book/glossary.tex b/book/glossary.tex index 0f84a89..9863d53 100644 --- a/book/glossary.tex +++ b/book/glossary.tex @@ -5,6 +5,14 @@ for scientific documents} } +\newglossaryentry{binary} +{ + name=binary, + description={Something that has two parts or states. In computing + these two states are represented by the numbers one and zero or + by the conditions true and false and can be stored in one bit} +} + \newglossaryentry{bit} { name=bit, @@ -84,6 +92,23 @@ caused by low--order truncation} } +\newglossaryentry{MachineLanguage} +{ + name={machine language}, + description={The instructions that are executed by a CPU that are expressed + in the form of binary values} +} +\newglossaryentry{register} +{ + name={register}, + description={A unit of storage inside a CPU} +} +\newglossaryentry{program} +{ + name={program}, + description={A ordered list of one or more instructions} +} + @@ -91,3 +116,4 @@ \newacronym{msb}{MSB}{Most Significant Bit} \newacronym{lsb}{LSB}{Least Significant Bit} \newacronym{isa}{ISA}{Instruction Set Architecture} +\newacronym{cpu}{CPU}{Central Processing Unit} diff --git a/book/intro/chapter.tex b/book/intro/chapter.tex index 49e8e3d..43b3ca2 100644 --- a/book/intro/chapter.tex +++ b/book/intro/chapter.tex @@ -1,10 +1,124 @@ \chapter{Introduction} \label{chapter:Introduction} +At its core, a digital computer has at least one \acrfull{cpu}. A +CPU executes a continuous stream of instructions called a \gls{program}. +These program instructions are expressed in what is called +\gls{MachineLanguage}. Each machine language instruction is a binary value. +In order to provide a method to simplify the management of machine language +programs a symbolic mapping is provided where a mneumonic can be used to +specify each machine instruction and any of its parameters\ldots\ rather +than mandate that programs be expressed as binary machine language +instructions. The set of mneumonics, parameters and rules for specifying +them is called an {\em Assembly Language}. + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\section{The Digital Computer} + +A digital computer is composed of storage systems (memory, disc drives, +USB drives, etc.), a CPU (with one or more cores), input peripherals like +a keyboard and mouse and output peripherals like a display or speakers. + +\subsection{Storage Systems} + +Computer storage systems are used to hold the data and instructions +for the CPU. + +Types of computer storage can be classified into two categories. +Volatile and non--volatile. + +\subsubsection{Volatile Storage} + +Volatile storage is characterized by the fact that it will lose its +contents (forget) any time that it is powered off. + +One type of volatile storage is provided inside the CPU itself in +small blocks called \glspl{register}. These registers are used to +hold individual data values that can be manipulated by the instructions +that are executed by the CPU. + +Another type of volatile storage is main memory. +Main memory is connected to a computer's CPU and is used to hold +the data and instructions that can not fit into the CPU registers. + +Typically, a CPU's registers can hold tens of data values while +the main memory can contain many billions of data values. + +A CPU can process data in a register at a speed that can be an order +of magnitude faster than the rate that it can process (specifically, +transfer data and instructions to and from) the main memory. + +Register storage costs an order of magnitude more to manufacture than +main memory. While it is desirable to have many registers the economics +dictate that the vast majority of volatile computer storage be provided +in its main memory. As a result, optimizing the copying of data between +the registers and main memory is a desirable trait of good programs. + +\subsubsection{Non--Volatile Storage} + +Non--volatile storage is characterized by the fact that it will {\em NOT} +lose its contents when it is powered off. + +Common types of non--volatile storage are disc drives, flash cards and USB +drives. Prices can vary widely depending on size and transfer speeds. + +It is typical for a computer system's non--volatile storage to operate +more slowly than its main memory. + +\subsection{CPU} + +The \acrshort{cpu} is a collection of registers and circuitry designed +to read data and instructions from the system storage. The instructions +are used to instruct the CPU how to perform various mathamatical and +logical operations on the data in its registers and write the results +of those operations back into the system storage. + +\subsection{Peripherals} + +A peripheral is a device that is not a CPU or main memory. They are +typically used to transfer information/data into and out of the +main memory. + +This text is not particularly concerned with the peripherals of a computer +system other than in those sections where instructions are discussed +whose purpose is to address the needs of a peripheral device. Such +instructions are used to initiate, execute and/or synchronize data transfers. + + %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \section{Instruction Set Architecture} -Discuss the IMAFD, G and other ISA extensions mean. +The catalog of rules that describe all of the details of the instructions +that a given CPU can execute is called its \acrfull{isa}. +The RISC--V CPU ISA is defined as a set of modules. The purpose of +dividing the ISA into modules is to allow an implementor to select which +features to incorporate into a CPU design. +Any given RISC--V implementation must provide one of the {\em base} +modules and zero or more of the {\em extension} modules. + +\subsection{RV Base Modules} +The base modules are RV32I (32--bit general purpose), +RV32E (32--bit embedded), RV64I (64--bit general purpose) +and RV128I (128--bit general purpose). + +These base modules provide the minimal functional set of integer operations +needed to execute an application. The differing bit--widths address +the needs of different main--memory sizes. + +This text discusses programming the RV32I using assembly language. + +\subsection{Extension Modules} + +RISC-V extension modules may be included by an implementor interested +in optimizing a design for one or more purposes. + +Available extension modules include M (integer math), A (atomic), +F (32--bit floating point), D (64--bit floating point), +Q (128--bit floating point), C (compressed size instructions) and others. + +The extension name {\em G} is used to represent the combined set of IMAFD +extensions as is expected to be a common combination.