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157 lines
4.0 KiB
C
157 lines
4.0 KiB
C
/* Definitions of types that are used to store AVR architecture and
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device information.
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Copyright (C) 2012-2013 Free Software Foundation, Inc.
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Contributed by Georg-Johann Lay (avr@gjlay.de)
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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/* This enum supplies indices into the avr_arch_types[] table below. */
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enum avr_arch
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{
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ARCH_UNKNOWN,
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ARCH_AVR1,
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ARCH_AVR2,
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ARCH_AVR25,
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ARCH_AVR3,
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ARCH_AVR31,
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ARCH_AVR35,
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ARCH_AVR4,
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ARCH_AVR5,
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ARCH_AVR51,
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ARCH_AVR6,
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ARCH_AVRXMEGA2,
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ARCH_AVRXMEGA4,
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ARCH_AVRXMEGA5,
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ARCH_AVRXMEGA6,
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ARCH_AVRXMEGA7
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};
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/* Architecture-specific properties. */
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typedef struct
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{
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/* Assembler only. */
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int asm_only;
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/* Core have 'MUL*' instructions. */
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int have_mul;
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/* Core have 'CALL' and 'JMP' instructions. */
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int have_jmp_call;
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/* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
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int have_movw_lpmx;
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/* Core have 'ELPM' instructions. */
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int have_elpm;
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/* Core have 'ELPM Rx,Z' instructions. */
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int have_elpmx;
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/* Core have 'EICALL' and 'EIJMP' instructions. */
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int have_eijmp_eicall;
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/* This is an XMEGA core. */
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int xmega_p;
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/* This core has the RAMPD special function register
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and thus also the RAMPX, RAMPY and RAMPZ registers. */
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int have_rampd;
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/* Default start of data section address for architecture. */
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int default_data_section_start;
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/* Offset between SFR address and RAM address:
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SFR-address = RAM-address - sfr_offset */
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int sfr_offset;
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/* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
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const char *const macro;
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/* Architecture name. */
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const char *const arch_name;
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} avr_arch_t;
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/* Device-specific properties. */
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typedef struct
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{
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/* Device name. */
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const char *const name;
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/* Index in avr_arch_types[]. */
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enum avr_arch arch;
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/* Must lie outside user's namespace. NULL == no macro. */
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const char *const macro;
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/* Stack pointer have 8 bits width. */
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int short_sp;
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/* Some AVR devices have a core erratum when skipping a 2-word instruction.
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Skip instructions are: SBRC, SBRS, SBIC, SBIS, CPSE.
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Problems will occur with return address is IRQ executes during the
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skip sequence.
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A support ticket from Atmel returned the following information:
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Subject: (ATTicket:644469) On AVR skip-bug core Erratum
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From: avr@atmel.com Date: 2011-07-27
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(Please keep the subject when replying to this mail)
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This errata exists only in AT90S8515 and ATmega103 devices.
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For information please refer the following respective errata links
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http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
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http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf */
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/* Core Erratum: Must not skip 2-word instruction. */
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int errata_skip;
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/* Start of data section. */
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int data_section_start;
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/* Number of 64k segments in the flash. */
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int n_flash;
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/* Name of device library. */
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const char *const library_name;
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} avr_mcu_t;
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/* Map architecture to its texinfo string. */
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typedef struct
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{
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/* Architecture ID. */
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enum avr_arch arch;
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/* textinfo source to describe the archtiecture. */
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const char *texinfo;
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} avr_arch_info_t;
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/* Preprocessor macros to define depending on MCU type. */
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extern const avr_arch_t avr_arch_types[];
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extern const avr_arch_t *avr_current_arch;
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extern const avr_mcu_t avr_mcu_types[];
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extern const avr_mcu_t *avr_current_device;
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