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https://github.com/Stichting-MINIX-Research-Foundation/netbsd.git
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346 lines
8.8 KiB
C
346 lines
8.8 KiB
C
/* $NetBSD: gtmr.c,v 1.16 2015/04/20 20:19:52 matt Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.16 2015/04/20 20:19:52 matt Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/intr.h>
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#include <sys/kernel.h>
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#include <sys/percpu.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/timetc.h>
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#include <prop/proplib.h>
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#include <arm/locore.h>
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#include <arm/cortex/gtmr_var.h>
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#include <arm/cortex/mpcore_var.h>
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static int gtmr_match(device_t, cfdata_t, void *);
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static void gtmr_attach(device_t, device_t, void *);
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static u_int gtmr_get_timecount(struct timecounter *);
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static struct gtmr_softc gtmr_sc;
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struct gtmr_percpu {
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uint32_t pc_delta;
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};
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static struct timecounter gtmr_timecounter = {
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.tc_get_timecount = gtmr_get_timecount,
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.tc_poll_pps = 0,
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.tc_counter_mask = ~0u,
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.tc_frequency = 0, /* set by cpu_initclocks() */
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.tc_name = NULL, /* set by attach */
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.tc_quality = 500,
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.tc_priv = >mr_sc,
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.tc_next = NULL,
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};
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CFATTACH_DECL_NEW(armgtmr, 0, gtmr_match, gtmr_attach, NULL, NULL);
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/* ARGSUSED */
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static int
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gtmr_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct mpcore_attach_args * const mpcaa = aux;
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if (gtmr_sc.sc_dev != NULL)
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return 0;
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if ((armreg_pfr1_read() & ARM_PFR1_GTIMER_MASK) == 0)
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return 0;
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if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0)
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return 0;
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return 1;
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}
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static void
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gtmr_attach(device_t parent, device_t self, void *aux)
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{
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struct mpcore_attach_args * const mpcaa = aux;
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struct gtmr_softc *sc = >mr_sc;
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prop_dictionary_t dict = device_properties(self);
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char freqbuf[sizeof("X.XXX SHz")];
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/*
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* This runs at a fixed frequency of 1 to 50MHz.
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*/
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prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
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KASSERT(sc->sc_freq != 0);
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humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000);
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aprint_naive("\n");
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aprint_normal(": ARMv7 Generic 64-bit Timer (%s)\n", freqbuf);
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/*
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* Enable the virtual counter to be accessed from usermode.
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*/
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armreg_cntk_ctl_write(armreg_cntk_ctl_read() |
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ARM_CNTKCTL_PL0VCTEN | ARM_CNTKCTL_PL0PCTEN);
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self->dv_private = sc;
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sc->sc_dev = self;
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#ifdef DIAGNOSTIC
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sc->sc_percpu = percpu_alloc(sizeof(struct gtmr_percpu));
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#endif
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evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL,
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device_xname(self), "missing interrupts");
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sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK,
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IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL);
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if (sc->sc_global_ih == NULL)
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panic("%s: unable to register timer interrupt", __func__);
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aprint_normal_dev(self, "interrupting on irq %d\n",
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mpcaa->mpcaa_irq);
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const uint32_t cnt_frq = armreg_cnt_frq_read();
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if (cnt_frq == 0) {
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aprint_verbose_dev(self, "cp15 CNT_FRQ not set\n");
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} else if (cnt_frq != sc->sc_freq) {
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aprint_verbose_dev(self,
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"cp15 CNT_FRQ (%u) differs from supplied frequency\n",
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cnt_frq);
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}
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gtmr_timecounter.tc_name = device_xname(sc->sc_dev);
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gtmr_timecounter.tc_frequency = sc->sc_freq;
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tc_init(>mr_timecounter);
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}
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void
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gtmr_init_cpu_clock(struct cpu_info *ci)
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{
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struct gtmr_softc * const sc = >mr_sc;
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KASSERT(ci == curcpu());
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int s = splsched();
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/*
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* enable timer and stop masking the timer.
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*/
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armreg_cntv_ctl_write(ARM_CNTCTL_ENABLE);
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armreg_cntp_ctl_write(ARM_CNTCTL_ENABLE);
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#if 0
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printf("%s: cntctl=%#x\n", __func__, armreg_cntv_ctl_read());
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#endif
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/*
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* Get now and update the compare timer.
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*/
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arm_isb();
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ci->ci_lastintr = armreg_cntv_ct_read();
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armreg_cntv_tval_write(sc->sc_autoinc);
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#if 0
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printf("%s: %s: delta cval = %"PRIu64"\n",
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__func__, ci->ci_data.cpu_name,
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armreg_cntv_cval_read() - ci->ci_lastintr);
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#endif
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splx(s);
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KASSERT(armreg_cntv_ct_read() != 0);
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#if 0
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printf("%s: %s: ctl %#x cmp %#"PRIx64" now %#"PRIx64"\n",
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__func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(),
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armreg_cntv_cval_read(), armreg_cntv_ct_read());
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s = splsched();
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arm_isb();
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uint64_t now64;
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uint64_t start64 = armreg_cntv_ct_read();
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do {
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arm_isb();
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now64 = armreg_cntv_ct_read();
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} while (start64 == now64);
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start64 = now64;
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uint64_t end64 = start64 + 64;
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uint32_t start32 = armreg_pmccntr_read();
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do {
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arm_isb();
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now64 = armreg_cntv_ct_read();
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} while (end64 != now64);
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uint32_t end32 = armreg_pmccntr_read();
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uint32_t diff32 = end64 - start64;
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printf("%s: %s: %u cycles per tick\n",
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__func__, ci->ci_data.cpu_name, (end32 - start32) / diff32);
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printf("%s: %s: status %#x cmp %#"PRIx64" now %#"PRIx64"\n",
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__func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(),
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armreg_cntv_cval_read(), armreg_cntv_ct_read());
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splx(s);
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#elif 0
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delay(1000000 / hz + 1000);
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#endif
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}
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void
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cpu_initclocks(void)
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{
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struct gtmr_softc * const sc = >mr_sc;
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KASSERT(sc->sc_dev != NULL);
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KASSERT(sc->sc_freq != 0);
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sc->sc_autoinc = sc->sc_freq / hz;
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gtmr_init_cpu_clock(curcpu());
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}
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void
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gtmr_delay(unsigned int n)
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{
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struct gtmr_softc * const sc = >mr_sc;
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KASSERT(sc != NULL);
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uint32_t freq = sc->sc_freq ? sc->sc_freq : armreg_cnt_frq_read();
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KASSERT(freq != 0);
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/*
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* not quite divide by 1000000 but close enough
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* (higher by 1.3% which means we wait 1.3% longer).
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*/
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const uint64_t incr_per_us = (freq >> 20) + (freq >> 24);
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arm_isb();
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const uint64_t base = armreg_cntp_ct_read();
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const uint64_t delta = n * incr_per_us;
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const uint64_t finish = base + delta;
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while (armreg_cntp_ct_read() < finish) {
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arm_isb(); /* spin */
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}
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}
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void
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gtmr_bootdelay(unsigned int ticks)
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{
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const uint32_t ctl = armreg_cntv_ctl_read();
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armreg_cntv_ctl_write(ctl | ARM_CNTCTL_ENABLE | ARM_CNTCTL_IMASK);
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/* Write Timer/Value to set new compare time */
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armreg_cntv_tval_write(ticks);
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/* Spin until compare time is hit */
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while ((armreg_cntv_ctl_read() & ARM_CNTCTL_ISTATUS) == 0) {
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/* spin */
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}
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armreg_cntv_ctl_write(ctl);
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}
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/*
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* gtmr_intr:
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*
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* Handle the hardclock interrupt.
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*/
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int
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gtmr_intr(void *arg)
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{
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struct cpu_info * const ci = curcpu();
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struct clockframe * const cf = arg;
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struct gtmr_softc * const sc = >mr_sc;
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arm_isb();
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const uint64_t now = armreg_cntv_ct_read();
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uint64_t delta = now - ci->ci_lastintr;
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#ifdef DIAGNOSTIC
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const uint64_t then = armreg_cntv_cval_read();
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struct gtmr_percpu * const pc = percpu_getref(sc->sc_percpu);
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KASSERTMSG(then <= now, "%"PRId64, now - then);
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KASSERTMSG(then + pc->pc_delta >= ci->ci_lastintr + sc->sc_autoinc,
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"%"PRId64, then + pc->pc_delta - ci->ci_lastintr - sc->sc_autoinc);
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#endif
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#if 0
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printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n",
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__func__, cf, ci->ci_data.cpu_name, now, delta);
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#endif
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KASSERTMSG(delta > sc->sc_autoinc / 100,
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"%s: interrupting too quickly (delta=%"PRIu64") autoinc=%lu",
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ci->ci_data.cpu_name, delta, sc->sc_autoinc);
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/*
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* If we got interrupted too soon (delta < sc->sc_autoinc)
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* or we missed (or almost missed) a tick
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* (delta >= 7 * sc->sc_autoinc / 4), don't try to adjust for jitter.
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*/
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if (delta >= sc->sc_autoinc && delta <= 7 * sc->sc_autoinc / 4) {
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delta -= sc->sc_autoinc;
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} else {
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delta = 0;
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}
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armreg_cntv_tval_write(sc->sc_autoinc - delta);
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ci->ci_lastintr = now;
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#ifdef DIAGNOSTIC
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KASSERT(delta == (uint32_t) delta);
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pc->pc_delta = delta;
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percpu_putref(sc->sc_percpu);
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#endif
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hardclock(cf);
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sc->sc_ev_missing_ticks.ev_count += delta / sc->sc_autoinc;
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return 1;
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}
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void
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setstatclockrate(int newhz)
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{
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}
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static u_int
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gtmr_get_timecount(struct timecounter *tc)
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{
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arm_isb(); // we want the time NOW, not some instructions later.
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return (u_int) armreg_cntp_ct_read();
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}
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