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72 lines
2.4 KiB
C
72 lines
2.4 KiB
C
/* $Id: imx23_apbdmareg.h,v 1.3 2015/01/10 12:13:00 jmcneill Exp $ */
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/*
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Petri Laakso.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARM_IMX_IMX23_APBDMAREG_H_
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#define _ARM_IMX_IMX23_APBDMAREG_H_
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#include <sys/cdefs.h>
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/*
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* Common register definitions for both APBH and APBX.
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*/
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/*
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* AHB to APB{H,X} Bridge Control and Status Register 0.
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*/
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#define HW_APB_CTRL0 0x000
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#define HW_APB_CTRL0_SET 0x004
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#define HW_APB_CTRL0_CLR 0x008
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#define HW_APB_CTRL0_TOG 0x00C
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#define HW_APB_CTRL0_SFTRST __BIT(31)
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#define HW_APB_CTRL0_CLKGATE __BIT(30)
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#define HW_APB_CTRL0_RSVD0 __BITS(29, 0)
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/*
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* AHB to APB{H,X} Bridge Control Register 1.
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*/
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#define HW_APB_CTRL1 0x010
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#define HW_APB_CTRL1_SET 0x014
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#define HW_APB_CTRL1_CLR 0x018
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#define HW_APB_CTRL1_TOG 0x01C
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/*
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* AHB to APB{H,X} Bridge Control and Status Register 2.
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*/
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#define HW_APB_CTRL2 0x020
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#define HW_APB_CTRL2_SET 0x024
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#define HW_APB_CTRL2_CLR 0x028
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#define HW_APB_CTRL2_TOG 0x02C
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#define HW_APBX_CHANNEL_CTRL 0x30
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#define HW_APBX_CHANNEL_CTRL_SET 0x34
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#endif /* !_ARM_IMX_IMX23_APBDMAREG_H_ */
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