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107 lines
3.2 KiB
ArmAsm
107 lines
3.2 KiB
ArmAsm
/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_cputypes.h"
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#include <machine/asm.h>
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#include "assym.h"
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RCSID("$NetBSD: pmap_vfp.S,v 1.6 2012/12/31 01:19:36 matt Exp $")
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/*
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* This zeroes a page 64-bytes at a time. 64 was chosen over 32 since
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* 64 is the cache line size of the Cortex-A8.
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*/
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/* LINTSTUB: void bzero_page_vfp(vaddr_t); */
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ENTRY(bzero_page_vfp)
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push {r0, lr}
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bl _C_LABEL(vfp_kernel_acquire)
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pop {r0, lr}
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#if (CPU_CORTEX == 0)
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mov ip, #0
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vmov s0, ip
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vmov s1, ip
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vmov.f64 d1, d0
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vmov.f64 d2, d0
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vmov.f64 d3, d0
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vmov.f64 d4, d0
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vmov.f64 d5, d0
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vmov.f64 d6, d0
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vmov.f64 d7, d0
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#else
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veor q0, q0, q0
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veor q1, q1, q1
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veor q2, q2, q2
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veor q3, q3, q3
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#endif
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add r2, r0, #PAGE_SIZE
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1: vstmia r0!, {d0-d7}
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vstmia r0!, {d0-d7}
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vstmia r0!, {d0-d7}
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vstmia r0!, {d0-d7}
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cmp r0, r2
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blt 1b
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b _C_LABEL(vfp_kernel_release) /* tailcall the vfp release */
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END(bzero_page_vfp)
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/*
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* This copies a page 64-bytes at a time. 64 was chosen over 32 since
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* 64 is the cache line size of the Cortex-A8.
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*/
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/* LINTSTUB: void bcopy_page_vfp(vaddr_t, vaddr_t); */
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ENTRY(bcopy_page_vfp)
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#ifdef _ARM_ARCH_DWORD_OK
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pld [r0] @ preload the first 128 bytes
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pld [r0, #32]
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pld [r0, #64]
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pld [r0, #96]
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#endif
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str lr, [sp, #-8]!
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push {r0, r1}
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bl _C_LABEL(vfp_kernel_acquire)
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pop {r0, r1}
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ldr lr, [sp], #8 /* fetch LR */
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add r2, r0, #PAGE_SIZE-128
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1:
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#ifdef _ARM_ARCH_DWORD_OK
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pld [r0, #128] @ preload the next 128
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pld [r0, #160]
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pld [r0, #192]
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pld [r0, #224]
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#endif
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2: vldmia r0!, {d0-d7} @ read 0-63
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vstmia r1!, {d0-d7} @ write 0-63
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vldmia r0!, {d0-d7} @ read 64-127
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vstmia r1!, {d0-d7} @ write 64-127
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cmp r0, r2
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blt 1b
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beq 2b
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b _C_LABEL(vfp_kernel_release) /* tailcall the vfp release */
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END(bcopy_page_vfp)
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