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54 lines
2.2 KiB
C
54 lines
2.2 KiB
C
/* $NetBSD: 7750.h,v 1.5 2008/04/28 20:23:20 martin Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _HPCBOOT_SH_CPU_7750_H_
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#define _HPCBOOT_SH_CPU_7750_H_
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#define SH7750_CACHE_FLUSH() \
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__BEGIN_MACRO \
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uint32_t __e, __a; \
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\
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/* D-cache */ \
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for (__e = 0; __e < (SH4_DCACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
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__a = SH4REG_CCDA | (__e << CCDA_ENTRY_SHIFT); \
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VOLATILE_REF(__a) &= ~(CCDA_U | CCDA_V); \
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} \
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/* I-cache */ \
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for (__e = 0; __e < (SH4_ICACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
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__a = SH4REG_CCIA | (__e << CCIA_ENTRY_SHIFT); \
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VOLATILE_REF(__a) &= ~(CCIA_V); \
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} \
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__END_MACRO
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#define SH7750_MMU_DISABLE SH4_MMU_DISABLE
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#endif // _HPCBOOT_SH_CPU_7750_H_
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