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134 lines
3.1 KiB
C
134 lines
3.1 KiB
C
/* $NetBSD: delay.c,v 1.1 2006/09/01 21:26:18 uwe Exp $ */
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/*-
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* Copyright (c) 2005 NONAKA Kimihiro
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <lib/libsa/stand.h>
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#include <sh3/tmureg.h>
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#include "boot.h"
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#ifndef TICK_CH
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#define TICK_CH 0
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#endif
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#if TICK_CH == 0
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#define TSTR SH4_TSTR
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#define TCOR SH4_TCOR0
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#define TCNT SH4_TCNT0
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#define TCR SH4_TCR0
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#define TSTR_CH TSTR_STR0
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#elif TICK_CH == 1
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#define TSTR SH4_TSTR
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#define TCOR SH4_TCOR1
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#define TCNT SH4_TCNT1
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#define TCR SH4_TCR1
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#define TSTR_CH TSTR_STR1
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#elif TICK_CH == 2
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#define TSTR SH4_TSTR
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#define TCOR SH4_TCOR2
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#define TCNT SH4_TCNT2
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#define TCR SH4_TCR2
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#define TSTR_CH TSTR_STR2
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#elif TICK_CH == 3
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#define TSTR SH4_TSTR2
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#define TCOR SH4_TCOR3
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#define TCNT SH4_TCNT3
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#define TCR SH4_TCR3
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#define TSTR_CH SH4_TSTR2_STR3
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#elif TICK_CH == 4
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#define TSTR SH4_TSTR2
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#define TCOR SH4_TCOR4
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#define TCNT SH4_TCNT4
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#define TCR SH4_TCR4
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#define TSTR_CH SH4_TSTR2_STR4
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#else
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#error TICK_CH != [01234]
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#endif
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#ifndef TICK_PRESC
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#define TICK_PRESC 1024
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#endif
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#if TICK_PRESC == 4
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#define TCR_TPSC TCR_TPSC_P4
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#elif TICK_PRESC == 16
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#define TCR_TPSC TCR_TPSC_P16
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#elif TICK_PRESC == 64
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#define TCR_TPSC TCR_TPSC_P64
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#elif TICK_PRESC == 256
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#define TCR_TPSC TCR_TPSC_P256
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#elif TICK_PRESC == 1024
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#define TCR_TPSC SH4_TCR_TPSC_P1024
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#else
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#error TICK_PRESC != 4, 16, 64, 256, 1024
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#endif
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#define TICKS_PER_SEC (PCLOCK / TICK_PRESC)
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#define MS_PER_TICK (1000000 / TICKS_PER_SEC)
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int
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tick_init(void)
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{
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_reg_bclr_1(TSTR, TSTR_CH);
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_reg_write_2(TCR, TCR_TPSC);
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_reg_write_4(TCOR, 0xffffffff);
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_reg_write_4(TCNT, 0xffffffff);
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_reg_bset_1(TSTR, TSTR_CH);
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return 0;
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}
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void
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tick_stop(void)
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{
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_reg_bclr_1(TSTR, TSTR_CH);
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}
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uint32_t
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gettick(void)
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{
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return ~(_reg_read_4(TCNT));
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}
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void
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delay(int ms)
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{
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uint32_t base, now;
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base = gettick();
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for (;;) {
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now = gettick();
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if (((now - base) / MS_PER_TICK) > ms) {
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break;
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}
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}
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}
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