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263 lines
6.1 KiB
C
263 lines
6.1 KiB
C
/* $NetBSD: augpio.c,v 1.8 2015/06/27 03:33:18 matt Exp $ */
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/*-
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* Copyright (c) 2006 Itronix Inc.
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* All rights reserved.
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*
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* Written by Garrett D'Amore for Itronix Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Itronix Inc. may not be used to endorse
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* or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: augpio.c,v 1.8 2015/06/27 03:33:18 matt Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <dev/gpio/gpiovar.h>
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#include <mips/locore.h>
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#include <mips/alchemy/include/aubusvar.h>
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#include <mips/alchemy/include/aureg.h>
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#include <mips/alchemy/dev/augpioreg.h>
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#include <mips/alchemy/dev/augpiovar.h>
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struct augpio_softc {
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device_t sc_dev;
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struct gpio_chipset_tag sc_gc;
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gpio_pin_t sc_pins[AUGPIO_NPINS];
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int sc_npins;
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bus_space_tag_t sc_bst;
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int sc_caps;
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const char *sc_name;
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int (*sc_getctl)(void *, int);
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};
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static int augpio_match(device_t, struct cfdata *, void *);
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static void augpio_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(augpio, sizeof(struct augpio_softc),
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augpio_match, augpio_attach, NULL, NULL);
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#define GETREG(x) \
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(*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x))
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#define PUTREG(x, v) \
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((*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
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#define GETGPIO(x) GETREG(GPIO_BASE + (x))
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#define PUTGPIO(x,v) PUTREG(GPIO_BASE + (x), (v))
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#define GETGPIO2(x) GETREG(GPIO2_BASE + (x))
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#define PUTGPIO2(x,v) PUTREG(GPIO2_BASE + (x), (v))
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int
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augpio_match(device_t parent, struct cfdata *match, void *aux)
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{
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struct aubus_attach_args *aa = (struct aubus_attach_args *)aux;
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if (strcmp(aa->aa_name, "augpio") != 0)
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return 0;
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return 1;
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}
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void
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augpio_attach(device_t parent, device_t self, void *aux)
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{
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int pin;
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struct augpio_softc *sc = device_private(self);
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struct aubus_attach_args *aa = aux;
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struct gpiobus_attach_args gba;
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sc->sc_dev = self;
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sc->sc_bst = aa->aa_st;
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sc->sc_npins = aa->aa_addrs[1];
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sc->sc_gc.gp_cookie = sc;
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if (aa->aa_addrs[0] == GPIO_BASE) {
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sc->sc_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
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GPIO_PIN_TRISTATE;
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sc->sc_gc.gp_pin_read = augpio_read;
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sc->sc_gc.gp_pin_write = augpio_write;
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sc->sc_gc.gp_pin_ctl = augpio_ctl;
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sc->sc_getctl = augpio_getctl;
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sc->sc_name = "primary block";
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} else if (aa->aa_addrs[0] == GPIO2_BASE) {
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/*
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* We rely on firmware (or platform init code) to initialize
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* the GPIO2 block. We can't do it ourselves, because
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* resetting the GPIO2 block can have nasty effects (e.g.
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* reset PCI bus...)
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*/
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sc->sc_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
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sc->sc_gc.gp_pin_read = augpio2_read;
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sc->sc_gc.gp_pin_write = augpio2_write;
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sc->sc_gc.gp_pin_ctl = augpio2_ctl;
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sc->sc_getctl = augpio2_getctl;
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sc->sc_name = "secondary block";
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} else {
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aprint_error(": unidentified block\n");
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return;
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}
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for (pin = 0; pin < sc->sc_npins; pin++) {
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gpio_pin_t *pp = &sc->sc_pins[pin];
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pp->pin_num = pin;
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pp->pin_caps = sc->sc_caps;
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pp->pin_flags = sc->sc_getctl(sc, pin);
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pp->pin_state = sc->sc_gc.gp_pin_read(sc, pin);
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}
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gba.gba_gc = &sc->sc_gc;
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gba.gba_pins = sc->sc_pins;
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gba.gba_npins = sc->sc_npins;
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aprint_normal(": Alchemy GPIO, %s\n", sc->sc_name);
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aprint_naive("\n");
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config_found_ia(self, "gpiobus", &gba, gpiobus_print);
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}
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int
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augpio_read(void *arg, int pin)
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{
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pin = 1 << pin;
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if (GETGPIO(AUGPIO_PINSTATERD) & pin)
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return GPIO_PIN_HIGH;
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else
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return GPIO_PIN_LOW;
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}
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void
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augpio_write(void *arg, int pin, int value)
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{
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pin = 1 << pin;
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PUTGPIO(value ? AUGPIO_OUTPUTSET : AUGPIO_OUTPUTCLR, pin);
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}
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void
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augpio_ctl(void *arg, int pin, int flags)
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{
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bus_addr_t reg;
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pin = 1 << pin;
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if (flags & (GPIO_PIN_TRISTATE|GPIO_PIN_INPUT)) {
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reg = AUGPIO_TRIOUTCLR;
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} else if (flags & GPIO_PIN_OUTPUT) {
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uint32_t out;
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out = GETGPIO(AUGPIO_OUTPUTRD);
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reg = pin & out ? AUGPIO_OUTPUTSET : AUGPIO_OUTPUTCLR;
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} else {
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return;
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}
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PUTGPIO(reg, pin);
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}
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int
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augpio_getctl(void *arg, int pin)
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{
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if (GETGPIO(AUGPIO_TRIOUTRD) & pin)
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return GPIO_PIN_OUTPUT;
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else
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return GPIO_PIN_INPUT;
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}
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int
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augpio2_read(void *arg, int pin)
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{
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pin = 1 << pin;
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if (GETGPIO2(AUGPIO2_PINSTATE) & pin)
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return GPIO_PIN_HIGH;
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else
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return GPIO_PIN_LOW;
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}
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void
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augpio2_write(void *arg, int pin, int value)
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{
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pin = 1 << pin;
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if (value) {
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pin = pin | (pin << 16);
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} else {
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pin = (pin << 16);
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}
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PUTGPIO2(AUGPIO2_OUTPUT, pin);
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}
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void
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augpio2_ctl(void *arg, int pin, int flags)
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{
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uint32_t dir;
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pin = 1 << pin;
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dir = GETGPIO2(AUGPIO2_DIR);
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if (flags & GPIO_PIN_INPUT) {
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dir |= pin;
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} else if (flags & GPIO_PIN_OUTPUT) {
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dir &= ~pin;
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}
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PUTGPIO2(AUGPIO2_DIR, dir);
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}
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int
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augpio2_getctl(void *arg, int pin)
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{
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uint32_t dir;
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pin = 1 << pin;
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dir = GETGPIO2(AUGPIO2_DIR);
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if (dir & (uint32_t)pin) {
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return GPIO_PIN_OUTPUT;
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} else {
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return GPIO_PIN_INPUT;
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}
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}
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