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https://github.com/Stichting-MINIX-Research-Foundation/netbsd.git
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125 lines
4.9 KiB
C
125 lines
4.9 KiB
C
/* $NetbSD$ */
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/*
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* Copyright (c) 2007 Internet Initiative Japan, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* UART Registers
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*/
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#ifndef _OCTEON_UARTREG_H_
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#define _OCTEON_UARTREG_H_
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/* ---- register addresses */
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#define MIO_UART0_RBR 0x0001180000000800ULL
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#define MIO_UART0_IER 0x0001180000000808ULL
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#define MIO_UART0_IIR 0x0001180000000810ULL
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#define MIO_UART0_LCR 0x0001180000000818ULL
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#define MIO_UART0_MCR 0x0001180000000820ULL
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#define MIO_UART0_LSR 0x0001180000000828ULL
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#define MIO_UART0_MSR 0x0001180000000830ULL
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#define MIO_UART0_SCR 0x0001180000000838ULL
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#define MIO_UART0_THR 0x0001180000000840ULL
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#define MIO_UART0_FCR 0x0001180000000850ULL
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#define MIO_UART0_DLL 0x0001180000000880ULL
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#define MIO_UART0_DLH 0x0001180000000888ULL
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#define MIO_UART0_FAR 0x0001180000000920ULL
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#define MIO_UART0_TFR 0x0001180000000928ULL
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#define MIO_UART0_RFW 0x0001180000000930ULL
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#define MIO_UART0_USR 0x0001180000000938ULL
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#define MIO_UART0_TFL 0x0001180000000a00ULL
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#define MIO_UART0_RFL 0x0001180000000a08ULL
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#define MIO_UART0_SRR 0x0001180000000a10ULL
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#define MIO_UART0_SRTS 0x0001180000000a18ULL
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#define MIO_UART0_SBCR 0x0001180000000a20ULL
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#define MIO_UART0_SFE 0x0001180000000a30ULL
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#define MIO_UART0_SRT 0x0001180000000a38ULL
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#define MIO_UART0_STT 0x0001180000000b00ULL
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#define MIO_UART0_HTX 0x0001180000000b08ULL
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#define MIO_UART1_RBR 0x0001180000000c00ULL
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#define MIO_UART1_IER 0x0001180000000c08ULL
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#define MIO_UART1_IIR 0x0001180000000c10ULL
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#define MIO_UART1_LCR 0x0001180000000c18ULL
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#define MIO_UART1_MCR 0x0001180000000c20ULL
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#define MIO_UART1_LSR 0x0001180000000c28ULL
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#define MIO_UART1_MSR 0x0001180000000c30ULL
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#define MIO_UART1_SCR 0x0001180000000c38ULL
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#define MIO_UART1_THR 0x0001180000000c40ULL
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#define MIO_UART1_FCR 0x0001180000000c50ULL
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#define MIO_UART1_DLL 0x0001180000000c80ULL
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#define MIO_UART1_DLH 0x0001180000000c88ULL
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#define MIO_UART1_FAR 0x0001180000000d20ULL
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#define MIO_UART1_TFR 0x0001180000000d28ULL
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#define MIO_UART1_RFW 0x0001180000000d30ULL
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#define MIO_UART1_USR 0x0001180000000d38ULL
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#define MIO_UART1_TFL 0x0001180000000e00ULL
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#define MIO_UART1_RFL 0x0001180000000e08ULL
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#define MIO_UART1_SRR 0x0001180000000e10ULL
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#define MIO_UART1_SRTS 0x0001180000000e18ULL
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#define MIO_UART1_SBCR 0x0001180000000e20ULL
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#define MIO_UART1_SFE 0x0001180000000e30ULL
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#define MIO_UART1_SRT 0x0001180000000e38ULL
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#define MIO_UART1_STT 0x0001180000000f00ULL
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#define MIO_UART1_HTX 0x0001180000000f08ULL
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/* ---- snprintb */
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/* XXX */
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/* ---- bus_space */
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#define MIO_UART0_BASE 0x0001180000000800ULL
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#define MIO_UART1_BASE 0x0001180000000c00ULL
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#define MIO_UART_RBR_OFFSET 0x0000
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#define MIO_UART_IER_OFFSET 0x0008
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#define MIO_UART_IIR_OFFSET 0x0010
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#define MIO_UART_LCR_OFFSET 0x0018
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#define MIO_UART_MCR_OFFSET 0x0020
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#define MIO_UART_LSR_OFFSET 0x0028
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#define MIO_UART_MSR_OFFSET 0x0030
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#define MIO_UART_SCR_OFFSET 0x0038
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#define MIO_UART_THR_OFFSET 0x0040
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#define MIO_UART_FCR_OFFSET 0x0050
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#define MIO_UART_DLL_OFFSET 0x0080
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#define MIO_UART_DLH_OFFSET 0x0088
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#define MIO_UART_FAR_OFFSET 0x0120
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#define MIO_UART_TFR_OFFSET 0x0128
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#define MIO_UART_RFW_OFFSET 0x0130
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#define MIO_UART_USR_OFFSET 0x0138
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#define MIO_UART_TFL_OFFSET 0x0200
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#define MIO_UART_RFL_OFFSET 0x0208
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#define MIO_UART_SRR_OFFSET 0x0210
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#define MIO_UART_SRTS_OFFSET 0x0218
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#define MIO_UART_SBCR_OFFSET 0x0220
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#define MIO_UART_SFE_OFFSET 0x0230
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#define MIO_UART_SRT_OFFSET 0x0238
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#define MIO_UART_STT_OFFSET 0x0300
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#define MIO_UART_HTX_OFFSET 0x0308
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#endif /* _OCTEON_UARTREG_H_ */
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