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98 lines
3.4 KiB
C
98 lines
3.4 KiB
C
/* $NetBSD: spr.h,v 1.1 2014/09/03 19:34:26 matt Exp $ */
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/*-
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* Copyright (c) 2014 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _OR1K_SPR_H_
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#define _OR1K_SPR_H_
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#define SPR_GROUP __BITS(15,11)
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#define SPR_REG __BITS(10,0)
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#define SPR_MAKE(g,r) (__SHIFTIN((g), SPR_GROUP)|__SHIFTIN((r), SPR_REG))
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#define SPR_VR SPR_MAKE(0, 0)
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#define SPR_UPR SPR_MAKE(0, 1)
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#define SPR_CPUCFGR SPR_MAKE(0, 2)
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#define SPR_DMMUCFGR SPR_MAKE(0, 3)
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#define SPR_IMMUCFGR SPR_MAKE(0, 4)
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#define SPR_DCCFGR SPR_MAKE(0, 5)
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#define SPR_ICCFGR SPR_MAKE(0, 6)
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#define SPR_DCFGR SPR_MAKE(0, 7)
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#define SPR_PCCFGR SPR_MAKE(0, 8)
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#define SPR_VR2 SPR_MAKE(0, 9)
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#define SPR_AVR SPR_MAKE(0, 10)
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#define SPR_EVBAR SPR_MAKE(0, 11)
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#define SPR_AECR SPR_MAKE(0, 12)
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#define SPR_AESR SPR_MAKE(0, 13)
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#define SPR_NPC SPR_MAKE(0, 16)
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#define SPR_SR SPR_MAKE(0, 17)
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#define SR_CID __BITS(31,28)
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#define SR_SUMRA __BIT(16)
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#define SR_FO __BIT(15)
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#define SR_EPH __BIT(14)
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#define SR_DSX __BIT(13)
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#define SR_OVE __BIT(12)
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#define SR_OV __BIT(11)
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#define SR_CY __BIT(10)
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#define SR_F __BIT(9)
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#define SR_CE __BIT(8)
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#define SR_LEE __BIT(7)
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#define SR_IME __BIT(6)
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#define SR_DME __BIT(5)
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#define SR_ICE __BIT(4)
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#define SR_DCE __BIT(3)
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#define SR_IEE __BIT(2)
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#define SR_TEE __BIT(1)
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#define SR_SM __BIT(0)
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#define SPR_PPC SPR_MAKE(0, 18)
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#define SPR_FPCSR SPR_MAKE(0, 20)
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#define FPCSR_DZF __BIT(11)
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#define FPCSR_INF __BIT(10)
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#define FPCSR_IVF __BIT(9)
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#define FPCSR_IXF __BIT(8)
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#define FPCSR_ZF __BIT(7)
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#define FPCSR_QNF __BIT(6)
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#define FPCSR_SNF __BIT(5)
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#define FPCSR_UNF __BIT(4)
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#define FPCSR_OVF __BIT(3)
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#define FPCSR_RM __BITS(2,1)
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#define FPCSR_RM_RN 0
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#define FPCSR_RM_RZ 1
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#define FPCSR_RM_RP 2
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#define FPCSR_RM_RM 3
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#define FPCSR_FPEE __BIT(0)
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#define SPR_ISRn(n) SPR_MAKE(0, 21+(n))
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#define SPR_EPCRn(n) SPR_MAKE(0, 32+(n))
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#define SPR_EEARn(n) SPR_MAKE(0, 48+(n))
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#define SPR_ESRn(n) SPR_MAKE(0, 64+(n))
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#define SPR_GRPN(cid,n) SPR_MASK(0, 1024+(cid)*32+(n))
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#endif /* _OR1K_SPR_H_ */
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