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188 lines
7.1 KiB
C
188 lines
7.1 KiB
C
/* $NetBSD: ibm405gp.c,v 1.7 2011/08/17 18:52:01 matt Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ibm405gp.c,v 1.7 2011/08/17 18:52:01 matt Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/extent.h>
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#include <sys/bus.h>
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#include <dev/pci/pcivar.h>
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#include <powerpc/ibm4xx/ibm405gp.h>
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#include <powerpc/ibm4xx/pci_machdep.h>
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#include <powerpc/ibm4xx/dev/pcicreg.h>
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static struct powerpc_bus_space pcicfg_tag = {
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_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
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IBM405GP_PCIL0_BASE, 0x0, 0x40
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};
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static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(1)]
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__attribute__((aligned(8)));
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static bus_space_tag_t pcicfg_iot = &pcicfg_tag;
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static bus_space_handle_t pcicfg_ioh = 0;
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#define PCI0_MEM_BASE 0x80000000
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static struct genppc_pci_chipset genppc_ibm4xx_chipset = {
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.pc_conf_v = NULL,
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.pc_attach_hook = ibm4xx_pci_attach_hook,
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.pc_bus_maxdevs = ibm4xx_pci_bus_maxdevs,
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.pc_make_tag = ibm4xx_pci_make_tag,
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.pc_conf_read = ibm4xx_pci_conf_read,
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.pc_conf_write = ibm4xx_pci_conf_write,
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.pc_intr_v = &genppc_ibm4xx_chipset,
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.pc_intr_map = genppc_pci_intr_map,
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.pc_intr_string = genppc_pci_intr_string,
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.pc_intr_evcnt = genppc_pci_intr_evcnt,
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.pc_intr_establish = genppc_pci_intr_establish,
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.pc_intr_disestablish = genppc_pci_intr_disestablish,
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.pc_intr_setattr = ibm4xx_pci_intr_setattr,
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.pc_msi_v = &genppc_ibm4xx_chipset,
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GENPPC_PCI_MSI_INITIALIZER,
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.pc_conf_interrupt = ibm4xx_pci_conf_interrupt,
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.pc_decompose_tag = ibm4xx_pci_decompose_tag,
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.pc_conf_hook = ibm4xx_pci_conf_hook,
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};
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pci_chipset_tag_t
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ibm4xx_get_pci_chipset_tag(void)
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{
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return &genppc_ibm4xx_chipset;
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}
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static void
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setup_pcicfg_window(void)
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{
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if (pcicfg_ioh)
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return;
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if (bus_space_init(&pcicfg_tag,
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"pcicfg", ex_storage, sizeof(ex_storage)) ||
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bus_space_map(pcicfg_iot, 0, 0x40 , 0, &pcicfg_ioh))
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panic("Cannot map PCI configuration registers");
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}
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/*
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* Setup proper Local<->PCI mapping
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* PCI memory window: 256M @ PCI0MEMBASE with direct memory translation
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*/
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void
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ibm4xx_setup_pci(void)
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{
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pci_chipset_tag_t pc = &genppc_ibm4xx_chipset;
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pcitag_t tag;
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setup_pcicfg_window();
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/* Disable all three memory mappers */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA, 0x00000000); /* disabled */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1MA, 0x00000000); /* disabled */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2MA, 0x00000000); /* disabled */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS, 0x00000000); /* Can't really disable PTM1. */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2MS, 0x00000000); /* disabled */
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/* Setup memory map #0 */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA, 0xF0000001); /* 256M non-prefetchable, enabled */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0LA, PCI0_MEM_BASE);
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCILA, PCI0_MEM_BASE);
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCIHA, 0);
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/* Configure PCI bridge */
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tag = pci_make_tag(pc, 0, 0, 0);
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// x = pci_conf_read(pc, tag, PCI0_CMD); /* Read PCI command register */
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// pci_conf_write(pc, tag, PCI0_CMD, x | MA | ME); /* enable bus mastering and memory space */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS, 0xF0000001); /* Enable PTM1 */
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bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1LA, 0);
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pci_conf_write(pc, tag, PCIC_PTM1BAR, 0); /* Set up proper PCI->Local address base. Always enabled */
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pci_conf_write(pc, tag, PCIC_PTM2BAR, 0);
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}
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void
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ibm4xx_show_pci_map(void)
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{
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pci_chipset_tag_t pc = &genppc_ibm4xx_chipset;
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paddr_t la, lm, pl, ph;
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pcitag_t tag;
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setup_pcicfg_window();
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printf("Local -> PCI map\n");
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la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0LA);
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lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA);
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pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCILA);
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ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCIHA);
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printf("0: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
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(lm & 2) ? "":"not ",
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(lm & 1) ? "enabled":"disabled");
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la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1LA);
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lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1MA);
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pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1PCILA);
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ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1PCIHA);
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printf("1: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
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(lm & 2) ? "":"not ",
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(lm & 1) ? "enabled":"disabled");
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la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2LA);
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lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2MA);
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pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2PCILA);
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ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2PCIHA);
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printf("2: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
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(lm & 2) ? "":"not ",
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(lm & 1) ? "enabled":"disabled");
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printf("PCI -> Local map\n");
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tag = pci_make_tag(pc, 0, 0, 0);
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pl = pci_conf_read(pc, tag, PCIC_PTM1BAR);
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la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1LA);
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lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS);
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printf("1: %08lx -> %08lx,%08lx %s\n", pl, la, lm,
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(lm & 1)?"enabled":"disabled");
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pl = pci_conf_read(pc, tag, PCIC_PTM2BAR);
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la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2LA);
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lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2MS);
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printf("2: %08lx -> %08lx,%08lx %s\n", pl, la, lm,
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(lm & 1)?"enabled":"disabled");
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}
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