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52 lines
2.2 KiB
C
52 lines
2.2 KiB
C
/* $NetBSD: rgmiireg.h,v 1.1 2010/03/18 13:47:04 kiyohara Exp $ */
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/*
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* Copyright (c) 2010 KIYOHARA Takashi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IBM4XX_RGMIIREG_H_
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#define _IBM4XX_RGMIIREG_H_
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/* RGMII (reduced GMII) Bridge (405EX/440GX(EMAC 2, 3)) */
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#define RGMII0_SIZE 0x8
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#define RGMII0_FER 0x0 /* Function Enable Register */
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#define FER_MDIOEN_MASK 0x000c0000 /* MDIO enable */
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#define FER_MDIOEN(emac) (1 << ((1 - ((emac) % 2)) + 18))
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#define FER_CHCFG_MASK 0x7 /* EMAC n Mask */
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#define FER_CHCFG_RTBI 0x4 /* RTBI enabled */
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#define FER_CHCFG_RGMII 0x5 /* RGMII enabled */
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#define FER_CHCFG_TBI 0x6 /* TBI enabled */
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#define FER_CHCFG_GMII 0x7 /* GMII enabled */
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#define FER_CHCFG(rgmii, val) ((val) << ((rgmii) << 2))
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#define RGMII0_SSR 0x4 /* Speed Select Register */
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#define SSR_SP_MASK 0x7
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#define SSR_SP_10MBPS 0x0
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#define SSR_SP_100MBPS 0x2
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#define SSR_SP_1000MBPS 0x4
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#define SSR_SP(emac, sp) ((sp) << (((emac) % 2) << 3))
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#endif /* _IBM4XX_RGMIIREG_H_ */
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