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136 lines
3.8 KiB
C
136 lines
3.8 KiB
C
/* $NetBSD: dwc2var.h,v 1.4 2015/05/01 06:58:40 hikaru Exp $ */
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Nick Hudson
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DWC2VAR_H_
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#define _DWC2VAR_H_
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#include <sys/pool.h>
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#define DWC2_MAXISOCPACKETS 16
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struct dwc2_hsotg;
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struct dwc2_qtd;
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struct dwc2_xfer {
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struct usbd_xfer xfer; /* Needs to be first */
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struct usb_task abort_task;
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struct dwc2_hcd_urb *urb;
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int packet_count;
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TAILQ_ENTRY(dwc2_xfer) xnext; /* list of complete xfers */
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};
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struct dwc2_pipe {
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struct usbd_pipe pipe; /* Must be first */
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/* Current transfer */
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void *priv; /* QH */
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/* DMA buffer for control endpoint requests */
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usb_dma_t req_dma;
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};
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#define DWC2_BUS2SC(bus) ((bus)->hci_private)
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#define DWC2_PIPE2SC(pipe) DWC2_BUS2SC((pipe)->device->bus)
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#define DWC2_XFER2SC(xfer) DWC2_PIPE2SC((xfer)->pipe)
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#define DWC2_DPIPE2SC(d) DWC2_BUS2SC((d)->pipe.device->bus)
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#define DWC2_XFER2DXFER(x) (struct dwc2_xfer *)(x)
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#define DWC2_XFER2DPIPE(x) (struct dwc2_pipe *)(x)->pipe;
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#define DWC2_PIPE2DPIPE(p) (struct dwc2_pipe *)(p)
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typedef struct dwc2_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_dma_tag_t sc_dmat;
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struct dwc2_core_params *sc_params;
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int (*sc_set_dma_addr)(device_t, bus_addr_t, int);
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/*
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* Private
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*/
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struct usbd_bus sc_bus;
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struct dwc2_hsotg *sc_hsotg;
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kmutex_t sc_lock;
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bool sc_hcdenabled;
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void *sc_rhc_si;
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usbd_xfer_handle sc_intrxfer;
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device_t sc_child; /* /dev/usb# device */
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char sc_dying;
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struct usb_dma_reserve sc_dma_reserve;
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char sc_vendor[32]; /* vendor string for root hub */
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int sc_id_vendor; /* vendor ID for root hub */
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TAILQ_HEAD(, dwc2_xfer) sc_complete; /* complete transfers */
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uint8_t sc_addr; /* device address */
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uint8_t sc_conf; /* device configuration */
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pool_cache_t sc_xferpool;
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pool_cache_t sc_qhpool;
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pool_cache_t sc_qtdpool;
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} dwc2_softc_t;
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int dwc2_init(struct dwc2_softc *);
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int dwc2_intr(void *);
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int dwc2_detach(dwc2_softc_t *, int);
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bool dwc2_shutdown(device_t, int);
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void dwc2_childdet(device_t, device_t);
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int dwc2_activate(device_t, enum devact);
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bool dwc2_resume(device_t, const pmf_qual_t *);
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bool dwc2_suspend(device_t, const pmf_qual_t *);
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void dwc2_worker(struct work *, void *);
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void dwc2_host_complete(struct dwc2_hsotg *, struct dwc2_qtd *,
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int);
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static inline void
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dwc2_root_intr(dwc2_softc_t *sc)
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{
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softint_schedule(sc->sc_rhc_si);
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}
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#endif /* _DWC_OTGVAR_H_ */
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