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63 lines
2.4 KiB
C
63 lines
2.4 KiB
C
/* $NetBSD: imx51_dpllreg.h,v 1.1 2012/04/17 09:33:31 bsh Exp $ */
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/*
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* Copyright (c) 2012 Genetec Corporation. All rights reserved.
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* Written by Hashimoto Kenichi for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IMX51_DPLLREG_H
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#define _IMX51_DPLLREG_H
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#include <sys/cdefs.h>
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/* register offset address */
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#define IMX51_N_DPLLS 3 /* 1..3 */
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#define DPLL_BASE(n) (0x83F80000 + (0x4000 * ((n)-1)))
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#define DPLL_SIZE 0x100
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#define DPLL_DP_CTL 0x0000
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#define DP_CTL_HFSM __BIT(7)
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#define DP_CTL_REF_CLK_SEL_MASK __BITS(8,9)
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#define DP_CTL_REF_CLK_SEL_COSC (__BIT(9)|0)
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#define DP_CTL_REF_CLK_SEL_FPM (__BIT(9)|__BIT(8))
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#define DP_CTL_REF_CLK_DIV __BIT(10)
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#define DP_CTL_DPDCK0_2_EN __BIT(12)
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#define DPLL_DP_CONFIG 0x0004
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#define DPLL_DP_OP 0x0008
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#define DP_OP_PDF_SHIFT 0
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#define DP_OP_PDF_MASK (0xf << DP_OP_PDF_SHIFT)
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#define DP_OP_MFI_SHIFT 4
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#define DP_OP_MFI_MASK (0xf << DP_OP_MFI_SHIFT)
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#define DPLL_DP_MFD 0x000C
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#define DPLL_DP_MFN 0x0010
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#define DPLL_DP_MFNMINUS 0x0014
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#define DPLL_DP_MFNPLUS 0x0018
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#define DPLL_DP_HFS_OP 0x001C
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#define DPLL_DP_HFS_MFD 0x0020
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#define DPLL_DP_HFS_MFN 0x0024
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#define DPLL_DP_TOGC 0x0028
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#define DPLL_DP_DESTAT 0x002C
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#endif /* _IMX51_DPLLREG_H */
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