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149 lines
4.1 KiB
C
149 lines
4.1 KiB
C
/* $NetBSD: imxclock.c,v 1.6 2012/05/20 14:08:18 matt Exp $ */
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/*
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* Copyright (c) 2009, 2010 Genetec corp. All rights reserved.
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* Written by Hashimoto Kenichi for Genetec corp.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORP.
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* common part for i.MX31 and i.MX51
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/evcnt.h>
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#include <sys/atomic.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/types.h>
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#include <sys/device.h>
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#include <machine/intr.h>
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#include <sys/bus.h>
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#include <arm/cpu.h>
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#include <arm/armreg.h>
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#include <arm/cpufunc.h>
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#include <arm/imx/imxclockvar.h>
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#include <arm/imx/imxepitreg.h>
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static u_int imx_epit_get_timecount(struct timecounter *);
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static int imxclock_intr(void *);
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static struct timecounter imx_epit_timecounter = {
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imx_epit_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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0xffffffff, /* counter_mask */
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0, /* frequency */
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"epit", /* name */
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100, /* quality */
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NULL, /* prev */
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NULL, /* next */
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};
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static volatile uint32_t imxclock_base;
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void
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cpu_initclocks(void)
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{
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uint32_t reg;
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u_int freq;
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if (!epit1_sc) {
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panic("%s: driver has not been initialized!", __FUNCTION__);
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}
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freq = imxclock_get_timerfreq(epit1_sc);
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imx_epit_timecounter.tc_frequency = freq;
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tc_init(&imx_epit_timecounter);
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aprint_verbose_dev(epit1_sc->sc_dev,
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"timer clock frequency %d\n", freq);
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epit1_sc->sc_reload_value = freq / hz - 1;
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/* stop all timers */
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bus_space_write_4(epit1_sc->sc_iot, epit1_sc->sc_ioh, EPIT_EPITCR, 0);
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bus_space_write_4(epit2_sc->sc_iot, epit2_sc->sc_ioh, EPIT_EPITCR, 0);
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aprint_normal("clock: hz=%d stathz = %d\n", hz, stathz);
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bus_space_write_4(epit1_sc->sc_iot, epit1_sc->sc_ioh, EPIT_EPITLR,
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epit1_sc->sc_reload_value);
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bus_space_write_4(epit1_sc->sc_iot, epit1_sc->sc_ioh, EPIT_EPITCMPR, 0);
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reg = EPITCR_ENMOD | EPITCR_IOVW | EPITCR_RLD | epit1_sc->sc_clksrc;
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bus_space_write_4(epit1_sc->sc_iot, epit1_sc->sc_ioh,
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EPIT_EPITCR, reg);
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reg |= EPITCR_EN | EPITCR_OCIEN | EPITCR_WAITEN | EPITCR_DOZEN |
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EPITCR_STOPEN;
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bus_space_write_4(epit1_sc->sc_iot, epit1_sc->sc_ioh,
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EPIT_EPITCR, reg);
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epit1_sc->sc_ih = intr_establish(epit1_sc->sc_intr, IPL_CLOCK,
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IST_LEVEL, imxclock_intr, NULL);
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}
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#if 0
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void
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microtime(struct timeval *tvp)
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{
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}
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#endif
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void
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setstatclockrate(int schz)
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{
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}
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static int
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imxclock_intr(void *arg)
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{
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struct imxclock_softc *sc = epit1_sc;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, EPIT_EPITSR, 1);
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atomic_add_32(&imxclock_base, sc->sc_reload_value);
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hardclock((struct clockframe *)arg);
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return 1;
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}
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u_int
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imx_epit_get_timecount(struct timecounter *tc)
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{
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uint32_t counter;
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uint32_t base;
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u_int oldirqstate;
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oldirqstate = disable_interrupts(I32_bit);
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counter = bus_space_read_4(epit1_sc->sc_iot, epit1_sc->sc_ioh, EPIT_EPITCNT);
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base = imxclock_base;
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restore_interrupts(oldirqstate);
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return base - counter;
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}
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