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195 lines
5.5 KiB
C++
195 lines
5.5 KiB
C++
/* $NetBSD: arm_sa1100.cpp,v 1.3 2010/04/06 16:20:28 nonaka Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arm/arm_arch.h>
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#include <console.h>
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#include <memory.h>
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#include <arm/arm_sa1100.h>
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/*
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* Strong-ARM SA-1100 (e.g. HP-820 JORNADA)
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*/
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#define PAGE_SIZE 0x1000
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#define DRAM_BANK_NUM 4 /* total 512MByte */
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#define DRAM_BANK_SIZE 0x08000000 /* 128Mbyte */
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#define DRAM_BANK0_START 0xc0000000
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#define DRAM_BANK0_SIZE DRAM_BANK_SIZE
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#define DRAM_BANK1_START 0xc8000000
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#define DRAM_BANK1_SIZE DRAM_BANK_SIZE
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#define DRAM_BANK2_START 0xd0000000
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#define DRAM_BANK2_SIZE DRAM_BANK_SIZE
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#define DRAM_BANK3_START 0xd8000000
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#define DRAM_BANK3_SIZE DRAM_BANK_SIZE
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#define ZERO_BANK_START 0xe0000000
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#define ZERO_BANK_SIZE DRAM_BANK_SIZE
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__BEGIN_DECLS
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// 2nd bootloader
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void boot_func_sa1100(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
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extern char boot_func_end_sa1100[];
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#define BOOT_FUNC_START reinterpret_cast <vaddr_t>(boot_func_sa1100)
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#define BOOT_FUNC_END reinterpret_cast <vaddr_t>(boot_func_end_sa1100)
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/* jump to 2nd loader */
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void FlatJump_sa1100(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
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__END_DECLS
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SA1100Architecture::SA1100Architecture(Console *&cons, MemoryManager *&mem)
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: ARMArchitecture(cons, mem)
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{
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DPRINTF((TEXT("SA-11x0 CPU.\n")));
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}
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SA1100Architecture::~SA1100Architecture(void)
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{
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}
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BOOL
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SA1100Architecture::init(void)
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{
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if (!_mem->init()) {
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DPRINTF((TEXT("can't initialize memory manager.\n")));
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return FALSE;
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}
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// set D-RAM information
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_mem->loadBank(DRAM_BANK0_START, DRAM_BANK_SIZE);
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_mem->loadBank(DRAM_BANK1_START, DRAM_BANK_SIZE);
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_mem->loadBank(DRAM_BANK2_START, DRAM_BANK_SIZE);
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_mem->loadBank(DRAM_BANK3_START, DRAM_BANK_SIZE);
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// set D-cache information
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dcachesize = 8192;
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DPRINTF((TEXT("D-cache size = %d\n"), dcachesize));
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return TRUE;
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}
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void
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SA1100Architecture::testFramebuffer(void)
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{
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// get frame buffer address from LCD controller register.
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paddr_t fbaddr_p = _mem->readPhysical4(0xb0100010); // 0xc0002e00
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// map frame buffer
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vaddr_t fbaddr_v = _mem->mapPhysicalPage(fbaddr_p, 0x50000,
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PAGE_READWRITE);
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// test frame buffer
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int j, k;
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DI();
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for (j = 0; j < 480; j++)
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for (k = 0; k < 640; k++)
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VOLATILE_REF8(fbaddr_v + 0x200 + j * 640 + k)
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= j * k & 0xff;
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for (j = 120; j < 360; j++)
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for (k = 120; k < 520; k++)
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VOLATILE_REF8(fbaddr_v + 0x200 + j * 640 + k) = 0x3;
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EI();
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_mem->unmapPhysicalPage(fbaddr_v);
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}
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void
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SA1100Architecture::testUART(void)
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{
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#define TBY VOLATILE_REF(uart + 0x20)
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#define UTDR VOLATILE_REF(uart + 0x14)
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#define TBY_BUSY while (TBY & 0x1)
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#define UTDR_PUTCHAR(c) (UTDR =(c))
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#define _(c) \
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__BEGIN_MACRO \
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TBY_BUSY; \
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UTDR_PUTCHAR(c); \
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__END_MACRO
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vaddr_t uart =
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_mem->mapPhysicalPage(0x80050000, 0x100, PAGE_READWRITE);
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_('H');_('e');_('l');_('l');_('o');_(' ');
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_('W');_('o');_('r');_('l');_('d');_('\r');_('\n');
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_mem->unmapPhysicalPage(uart);
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}
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void
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SA1100Architecture::dumpPeripheralRegs(void)
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{
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}
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BOOL
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SA1100Architecture::setupLoader(void)
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{
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vaddr_t v;
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vsize_t sz = BOOT_FUNC_END - BOOT_FUNC_START;
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// check 2nd bootloader size.
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if (sz > _mem->getPageSize()) {
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DPRINTF((TEXT("2nd bootloader size(%dbyte) is larger than page size(%d).\n"),
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sz, _mem->getPageSize()));
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return FALSE;
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}
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// get physical mapped page and copy loader to there.
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// don't writeback D-cache here. make sure to writeback before jump.
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if (!_mem->getPage(v , _loader_addr)) {
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DPRINTF((TEXT("can't get page for 2nd loader.\n")));
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return FALSE;
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}
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DPRINTF((TEXT("2nd bootloader vaddr=0x%08x paddr=0x%08x\n"),
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(unsigned)v,(unsigned)_loader_addr));
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memcpy(reinterpret_cast <LPVOID>(v),
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reinterpret_cast <LPVOID>(BOOT_FUNC_START), sz);
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DPRINTF((TEXT("2nd bootloader copy done.\n")));
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return TRUE;
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}
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void
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SA1100Architecture::jump(paddr_t info, paddr_t pvec)
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{
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kaddr_t sp;
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vaddr_t v;
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paddr_t p;
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// stack for bootloader
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_mem->getPage(v, p);
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sp = ptokv(p) + _mem->getPageSize();
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DPRINTF((TEXT("sp for bootloader = %08x + %08x = %08x\n"),
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ptokv(p), _mem->getPageSize(), sp));
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// writeback whole D-cache
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WritebackDCache();
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SetKMode(1);
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FlatJump_sa1100(info, pvec, sp, _loader_addr);
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// NOTREACHED
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}
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