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227 lines
11 KiB
C
227 lines
11 KiB
C
/*-
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* Copyright (C) 2001-2003 by NBMK Encryption Technologies.
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* All rights reserved.
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*
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* NBMK Encryption Technologies provides no support of any kind for
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* this software. Questions or concerns about it may be addressed to
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* the members of the relevant open-source community at
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* <tech-crypto@netbsd.org>.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*****************************************************************************
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* @(#) n8_driver_main.h 1.27@(#)
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*****************************************************************************/
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/*****************************************************************************/
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/** @file n8_driver_main.h
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* @brief NSP2000 Device Driver main common header
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*
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* This file contains all data structures, constants, and prototypes used by
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* the NSP2000 Device Driver.
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*
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*****************************************************************************/
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/*****************************************************************************
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* Revision history:
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* 02/12/04 bac Fixed time-related defines to be more clear.
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* 04/21/03 brr Move several non-configuration constants here from
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* n8_driver_parms.h.
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* 03/19/03 brr Added statistics to better track IRS's.
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* 02/20/03 brr Eliminated all references to shared memory.
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* 11/25/02 brr Move multiply defined constants to this on file. Also
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* reformat to conform to coding standards.
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* 10/10/02 brr Eliminate eventWaitType.
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* 06/25/02 brr Moved SKS constants here from n8_driver_parms.h.
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* 05/30/02 brr Keep statistics for bus errors.
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* 05/20/02 brr Revert to a single AMBA wait queue.
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* 05/02/02 brr Moved SKS semaphore here from queue struture.
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* 03/19/02 msz Shadow memory is now called shared memory.
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* 02/25/02 brr Removed references to qmgrData.
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* 02/15/02 brr Removed obsolete FPGA defines, added context memory support.
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* 01/15/02 msz Support of an array of AMBA wait blocks.
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* 11/26/01 mmd Added N8_PCIDEVICES_t type and PCIinfo field to NspInstance_t.
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* Pruned some no-longer used fields. Renamed from simon_drv.h.
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* 11/15/01 mmd Eliminated memory struct field.
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* 11/14/01 mmd Moved all magic numbers to n8_driver_parms.h.
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* 11/10/01 brr Modified to support static allocations of persistant data
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* by the driver.
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* 11/06/01 mmd Added FPGA_Type and FPGA_CrystalType fields to
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* SimonInstance_t.
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* 10/11/01 mmd Added programmed field to SimonInstance_t.
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* 09/25/01 mmd Added SKSSize, ContextMemSize, HardwareVersion, and
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* RevisionID to SimonInstance_t, and changed field name from
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* FPGA to IsFPGA.
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* 09/24/01 mmd Added AMBAblock, AMBAbitmask, and AMBAirqstatus to
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* SimonInstance_t.
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* 09/20/01 mmd Removed pid field from SimonInstance_t.
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* 09/13/01 mmd Added FPGAsessionID and FPGAlocked to the SimonInstance_t
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* structure, for FPGA lock safeguarding.
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* 09/12/01 mmd Moved declaration of NSPDeviceTable_g, NSPcount_g, and
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* N8_FPGA_g to driverglobals.h.
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* 09/10/01 mmd Moved declaration of global resources to this header.
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* 09/07/01 mmd Added DEF_PSEUDO_DEVICE to implement the pseudo device.
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* 08/21/01 mmd Added new fields to SimonInstance_t (coretype, FPGALock).
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* 08/16/01 mmd Removed inclusion of n8_types.h..
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* 07/27/01 brr Added PLX & LCR macros.
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* 06/17/01 mmd Further cleanup and debugging.
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* 05/29/01 mmd Incorporated suggestions from code review.
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* 05/17/01 mmd Original version.
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****************************************************************************/
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#ifndef N8_DRIVER_MAIN_H
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#define N8_DRIVER_MAIN_H
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#include "helper.h"
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#include "n8_device_info.h"
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#include "n8_driver_parms.h"
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#include "contextMem.h"
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/* Time-related macros */
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#define N8_USECS_PER_SEC 1000000
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#define N8_USECS_PER_MSEC 1000
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#define N8_USECS_PER_TICK (N8_USECS_PER_SEC/HZ)
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#define N8_MINIMUM_YIELD_USECS (10 * N8_USECS_PER_MSEC)
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/*****************************************************************************
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* HARDWARE IDENTIFICATION - *
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* PCI devices are identified with unique vendor/device ID's. Also, here are *
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* some memory resource parameters for FPGAs, since they don't indicate the *
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* correct needed amount of address space for operation. *
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*****************************************************************************/
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#define DEF_ASIC_VENDOR_ID 0x170b
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#define DEF_ASIC_DEVICE_ID 0x0100
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#define DEF_ASIC_PCI_MEMORY_SIZE_2 (16384 * 4) /* 64K */
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#define N8_DEF_SKS_MEMSIZE 512
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#define N8_SKS_PROM_SIZE 4096
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#define N8_EA_CMD_BLK_SIZE 128
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#define N8_PKE_CMD_BLK_SIZE 32
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#define N8_RNG_CMD_BLK_SIZE 8
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#define N8_MAX_CMD_QUE_EXP 15
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#define N8_MIN_CMD_QUE_EXP 4
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#define N8_DEF_RNG_QUE_SIZE (1<<N8_DEF_RNG_QUE_EXP)
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/* The following two values are inSilicon PCI test registers that need */
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/* to be set to the PCI standards rather than their defaults. */
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#define INSILICON_PCI_TRDY_TIMEOUT 0x40
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#define INSILICON_PCI_RETRY_TIMEOUT 0x41
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/**************************************************************************
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* DEVICE INFORMATION STRUCTURES - *
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* *
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* The NSPDeviceTable_g is an array of structures, one per hardware *
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* instance, that retain assorted information about each instance. The *
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* minor number of any request indexes into this array. NSPcount_g *
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* maintains the number of detected NSP2000 hardware instances. *
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**************************************************************************/
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typedef struct
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{
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unsigned long base_address [6];
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unsigned long base_range [6];
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unsigned short vendor_id;
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unsigned short device_id;
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unsigned char revision_id;
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unsigned char irq;
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} N8_PCIDEVICES_t;
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/* Device instance information structure */
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typedef struct
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{
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void *dev; /* nsp2000_softsc_t * */
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wait_queue_head_t RNHblock; /* Wait queue for RNH IRQ's */
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wait_queue_head_t CCHblock; /* Wait queue for CCH IRQ's */
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wait_queue_head_t PKHblock; /* Wait queue for PKH IRQ's */
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wait_queue_head_t AMBAblock; /* Wait queue for AMBA IRQ's */
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unsigned long RNHbitmask; /* RNH IRQ bitmask */
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unsigned long CCHbitmask; /* CCH IRQ bitmask */
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unsigned long PKHbitmask; /* PKH IRQ bitmask */
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unsigned long AMBAbitmask; /* AMBA IRQ bitmask */
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unsigned long RNHirqstatus; /* RNH control/status @ IRQ */
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unsigned long CCHirqstatus; /* CCH control/status @ IRQ */
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unsigned long PKHirqstatus; /* PKH control/status @ IRQ */
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unsigned long AMBAirqstatus; /* AMBA control/status @ IRQ */
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int RNHbuserrors; /* Counter for bus errors */
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int PKHbuserrors; /* Counter for bus errors */
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int CCHbuserrors; /* Counter for bus errors */
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int RNHcmderrors; /* Counter for RNH errors */
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int PKHcmderrors; /* Counter for PKH errors */
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int CCHcmderrors; /* Counter for CCH errors */
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N8_PCIDEVICES_t PCIinfo; /* PCI config info per inst */
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unsigned long contextMemSize; /* Size of context memory (bytes) */
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unsigned long contextMemEntries;/* Size of context memory (entries) */
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unsigned long contextMemNext; /* Index to begin search for */
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/* next allocation. */
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ContextMemoryMap_t *contextMemMap_p; /* pointer to context memory */
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/* allocation map. */
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ATOMICLOCK_t contextMemSem; /* Mutual exclusion semaphore*/
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/********************************************************************************/
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unsigned short HardwareVersion; /* PCI Device ID */
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unsigned char RevisionID; /* PCI Revision ID */
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unsigned char chip; /* Number or this chip */
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void *RNqueue_p; /* Pointer to RN queue */
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unsigned long RNqueue_size; /* Size of RN queue in bytes */
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unsigned long RNqueue_base; /* Phys. base addr. of RN queue */
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void *PKqueue_p; /* Pointer to PK queue */
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unsigned long PKqueue_size; /* Size of PK queue in bytes */
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unsigned long PKqueue_base; /* Phys. base addr. of PK queue */
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void *EAqueue_p; /* Pointer to EA queue */
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unsigned long EAqueue_size; /* Size of EA queue in bytes */
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unsigned long EAqueue_base; /* Phys. base addr. of EA queue */
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char SKS_map[N8_DEF_SKS_MEMSIZE]; /* SKS allocation map */
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unsigned long SKS_size; /* Size of SKS in bytes */
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ATOMICLOCK_t SKSSem; /* resource lock for SKS map */
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void *RNGparms_p; /* Pointer to RNG parm struct */
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unsigned long RNGparms_size; /* Size of RNG parm struct (byte)*/
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unsigned long RNGparms_base; /* Phys. base addr. of RNG parms */
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unsigned long *NSPregs_p; /* NSP register mapping */
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unsigned long NSPregs_base; /* Phys. base addr. of NSP regs */
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uint16_t EAreadIndex; /* EA read index */
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uint16_t PKreadIndex; /* PK read index */
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N8_Hardware_t hardwareType; /* Device type for this chip */
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} NspInstance_t;
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#endif /* N8_DRIVER_MAIN_H */
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