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85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards

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The pixis code used in8/out8 all over the place.  Replace it with
in_8/out_8 macros.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2009-07-22 10:12:39 -05:00
parent 0a6d0c6320
commit 048e7efe91
8 changed files with 122 additions and 86 deletions
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78
board/freescale/common/pixis.c
View File

@ -39,7 +39,8 @@ static ulong strfractoint(uchar *strptr);
*/ */
void pixis_reset(void) void pixis_reset(void)
{ {
out8(PIXIS_BASE + PIXIS_RST, 0); u8 *pixis_base = (u8 *)PIXIS_BASE;
out_8(pixis_base + PIXIS_RST, 0);
} }
@ -49,6 +50,7 @@ void pixis_reset(void)
int set_px_sysclk(ulong sysclk) int set_px_sysclk(ulong sysclk)
{ {
u8 sysclk_s, sysclk_r, sysclk_v, vclkh, vclkl, sysclk_aux; u8 sysclk_s, sysclk_r, sysclk_v, vclkh, vclkl, sysclk_aux;
u8 *pixis_base = (u8 *)PIXIS_BASE;
switch (sysclk) { switch (sysclk) {
case 33: case 33:
@ -107,10 +109,10 @@ int set_px_sysclk(ulong sysclk)
vclkh = (sysclk_s << 5) | sysclk_r; vclkh = (sysclk_s << 5) | sysclk_r;
vclkl = sysclk_v; vclkl = sysclk_v;
out8(PIXIS_BASE + PIXIS_VCLKH, vclkh); out_8(pixis_base + PIXIS_VCLKH, vclkh);
out8(PIXIS_BASE + PIXIS_VCLKL, vclkl); out_8(pixis_base + PIXIS_VCLKL, vclkl);
out8(PIXIS_BASE + PIXIS_AUX, sysclk_aux); out_8(pixis_base + PIXIS_AUX, sysclk_aux);
return 1; return 1;
} }
@ -120,6 +122,7 @@ int set_px_mpxpll(ulong mpxpll)
{ {
u8 tmp; u8 tmp;
u8 val; u8 val;
u8 *pixis_base = (u8 *)PIXIS_BASE;
switch (mpxpll) { switch (mpxpll) {
case 2: case 2:
@ -137,9 +140,9 @@ int set_px_mpxpll(ulong mpxpll)
return 0; return 0;
} }
tmp = in8(PIXIS_BASE + PIXIS_VSPEED1); tmp = in_8(pixis_base + PIXIS_VSPEED1);
tmp = (tmp & 0xF0) | (val & 0x0F); tmp = (tmp & 0xF0) | (val & 0x0F);
out8(PIXIS_BASE + PIXIS_VSPEED1, tmp); out_8(pixis_base + PIXIS_VSPEED1, tmp);
return 1; return 1;
} }
@ -149,6 +152,7 @@ int set_px_corepll(ulong corepll)
{ {
u8 tmp; u8 tmp;
u8 val; u8 val;
u8 *pixis_base = (u8 *)PIXIS_BASE;
switch ((int)corepll) { switch ((int)corepll) {
case 20: case 20:
@ -174,9 +178,9 @@ int set_px_corepll(ulong corepll)
return 0; return 0;
} }
tmp = in8(PIXIS_BASE + PIXIS_VSPEED0); tmp = in_8(pixis_base + PIXIS_VSPEED0);
tmp = (tmp & 0xE0) | (val & 0x1F); tmp = (tmp & 0xE0) | (val & 0x1F);
out8(PIXIS_BASE + PIXIS_VSPEED0, tmp); out_8(pixis_base + PIXIS_VSPEED0, tmp);
return 1; return 1;
} }
@ -184,27 +188,29 @@ int set_px_corepll(ulong corepll)
void read_from_px_regs(int set) void read_from_px_regs(int set)
{ {
u8 *pixis_base = (u8 *)PIXIS_BASE;
u8 mask = 0x1C; /* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */ u8 mask = 0x1C; /* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */
u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN0); u8 tmp = in_8(pixis_base + PIXIS_VCFGEN0);
if (set) if (set)
tmp = tmp | mask; tmp = tmp | mask;
else else
tmp = tmp & ~mask; tmp = tmp & ~mask;
out8(PIXIS_BASE + PIXIS_VCFGEN0, tmp); out_8(pixis_base + PIXIS_VCFGEN0, tmp);
} }
void read_from_px_regs_altbank(int set) void read_from_px_regs_altbank(int set)
{ {
u8 *pixis_base = (u8 *)PIXIS_BASE;
u8 mask = 0x04; /* FLASHBANK and FLASHMAP controlled by PIXIS */ u8 mask = 0x04; /* FLASHBANK and FLASHMAP controlled by PIXIS */
u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN1); u8 tmp = in_8(pixis_base + PIXIS_VCFGEN1);
if (set) if (set)
tmp = tmp | mask; tmp = tmp | mask;
else else
tmp = tmp & ~mask; tmp = tmp & ~mask;
out8(PIXIS_BASE + PIXIS_VCFGEN1, tmp); out_8(pixis_base + PIXIS_VCFGEN1, tmp);
} }
#ifndef CONFIG_SYS_PIXIS_VBOOT_MASK #ifndef CONFIG_SYS_PIXIS_VBOOT_MASK
@ -214,50 +220,54 @@ void read_from_px_regs_altbank(int set)
void clear_altbank(void) void clear_altbank(void)
{ {
u8 tmp; u8 tmp;
u8 *pixis_base = (u8 *)PIXIS_BASE;
tmp = in8(PIXIS_BASE + PIXIS_VBOOT); tmp = in_8(pixis_base + PIXIS_VBOOT);
tmp &= ~CONFIG_SYS_PIXIS_VBOOT_MASK; tmp &= ~CONFIG_SYS_PIXIS_VBOOT_MASK;
out8(PIXIS_BASE + PIXIS_VBOOT, tmp); out_8(pixis_base + PIXIS_VBOOT, tmp);
} }
void set_altbank(void) void set_altbank(void)
{ {
u8 tmp; u8 tmp;
u8 *pixis_base = (u8 *)PIXIS_BASE;
tmp = in8(PIXIS_BASE + PIXIS_VBOOT); tmp = in_8(pixis_base + PIXIS_VBOOT);
tmp |= CONFIG_SYS_PIXIS_VBOOT_MASK; tmp |= CONFIG_SYS_PIXIS_VBOOT_MASK;
out8(PIXIS_BASE + PIXIS_VBOOT, tmp); out_8(pixis_base + PIXIS_VBOOT, tmp);
} }
void set_px_go(void) void set_px_go(void)
{ {
u8 tmp; u8 tmp;
u8 *pixis_base = (u8 *)PIXIS_BASE;
tmp = in8(PIXIS_BASE + PIXIS_VCTL); tmp = in_8(pixis_base + PIXIS_VCTL);
tmp = tmp & 0x1E; /* clear GO bit */ tmp = tmp & 0x1E; /* clear GO bit */
out8(PIXIS_BASE + PIXIS_VCTL, tmp); out_8(pixis_base + PIXIS_VCTL, tmp);
tmp = in8(PIXIS_BASE + PIXIS_VCTL); tmp = in_8(pixis_base + PIXIS_VCTL);
tmp = tmp | 0x01; /* set GO bit - start reset sequencer */ tmp = tmp | 0x01; /* set GO bit - start reset sequencer */
out8(PIXIS_BASE + PIXIS_VCTL, tmp); out_8(pixis_base + PIXIS_VCTL, tmp);
} }
void set_px_go_with_watchdog(void) void set_px_go_with_watchdog(void)
{ {
u8 tmp; u8 tmp;
u8 *pixis_base = (u8 *)PIXIS_BASE;
tmp = in8(PIXIS_BASE + PIXIS_VCTL); tmp = in_8(pixis_base + PIXIS_VCTL);
tmp = tmp & 0x1E; tmp = tmp & 0x1E;
out8(PIXIS_BASE + PIXIS_VCTL, tmp); out_8(pixis_base + PIXIS_VCTL, tmp);
tmp = in8(PIXIS_BASE + PIXIS_VCTL); tmp = in_8(pixis_base + PIXIS_VCTL);
tmp = tmp | 0x09; tmp = tmp | 0x09;
out8(PIXIS_BASE + PIXIS_VCTL, tmp); out_8(pixis_base + PIXIS_VCTL, tmp);
} }
@ -265,15 +275,16 @@ int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp,
int flag, int argc, char *argv[]) int flag, int argc, char *argv[])
{ {
u8 tmp; u8 tmp;
u8 *pixis_base = (u8 *)PIXIS_BASE;
tmp = in8(PIXIS_BASE + PIXIS_VCTL); tmp = in_8(pixis_base + PIXIS_VCTL);
tmp = tmp & 0x1E; tmp = tmp & 0x1E;
out8(PIXIS_BASE + PIXIS_VCTL, tmp); out_8(pixis_base + PIXIS_VCTL, tmp);
/* setting VCTL[WDEN] to 0 to disable watch dog */ /* setting VCTL[WDEN] to 0 to disable watch dog */
tmp = in8(PIXIS_BASE + PIXIS_VCTL); tmp = in_8(pixis_base + PIXIS_VCTL);
tmp &= ~0x08; tmp &= ~0x08;
out8(PIXIS_BASE + PIXIS_VCTL, tmp); out_8(pixis_base + PIXIS_VCTL, tmp);
return 0; return 0;
} }
@ -288,6 +299,7 @@ U_BOOT_CMD(
int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{ {
int which_tsec = -1; int which_tsec = -1;
u8 *pixis_base = (u8 *)PIXIS_BASE;
uchar mask; uchar mask;
uchar switch_mask; uchar switch_mask;
@ -328,17 +340,15 @@ int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* Toggle whether the switches or FPGA control the settings */ /* Toggle whether the switches or FPGA control the settings */
if (!strcmp(argv[argc - 1], "switch")) if (!strcmp(argv[argc - 1], "switch"))
clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1, clrbits_8(pixis_base + PIXIS_VCFGEN1, switch_mask);
switch_mask);
else else
setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1, setbits_8(pixis_base + PIXIS_VCFGEN1, switch_mask);
switch_mask);
/* If it's not the switches, enable or disable SGMII, as specified */ /* If it's not the switches, enable or disable SGMII, as specified */
if (!strcmp(argv[argc - 1], "on")) if (!strcmp(argv[argc - 1], "on"))
clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask); clrbits_8(pixis_base + PIXIS_VSPEED2, mask);
else if (!strcmp(argv[argc - 1], "off")) else if (!strcmp(argv[argc - 1], "off"))
setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask); setbits_8(pixis_base + PIXIS_VSPEED2, mask);
return 0; return 0;
} }

22
board/freescale/mpc8536ds/mpc8536ds.c
View File

@ -529,20 +529,24 @@ ics307_clk_freq (unsigned char cw0, unsigned char cw1, unsigned char cw2)
unsigned long unsigned long
get_board_sys_clk(ulong dummy) get_board_sys_clk(ulong dummy)
{ {
u8 *pixis_base = (u8 *)PIXIS_BASE;
return ics307_clk_freq ( return ics307_clk_freq (
in8(PIXIS_BASE + PIXIS_VSYSCLK0), in_8(pixis_base + PIXIS_VSYSCLK0),
in8(PIXIS_BASE + PIXIS_VSYSCLK1), in_8(pixis_base + PIXIS_VSYSCLK1),
in8(PIXIS_BASE + PIXIS_VSYSCLK2) in_8(pixis_base + PIXIS_VSYSCLK2)
); );
} }
unsigned long unsigned long
get_board_ddr_clk(ulong dummy) get_board_ddr_clk(ulong dummy)
{ {
u8 *pixis_base = (u8 *)PIXIS_BASE;
return ics307_clk_freq ( return ics307_clk_freq (
in8(PIXIS_BASE + PIXIS_VDDRCLK0), in_8(pixis_base + PIXIS_VDDRCLK0),
in8(PIXIS_BASE + PIXIS_VDDRCLK1), in_8(pixis_base + PIXIS_VDDRCLK1),
in8(PIXIS_BASE + PIXIS_VDDRCLK2) in_8(pixis_base + PIXIS_VDDRCLK2)
); );
} }
#else #else
@ -551,8 +555,9 @@ get_board_sys_clk(ulong dummy)
{ {
u8 i; u8 i;
ulong val = 0; ulong val = 0;
u8 *pixis_base = (u8 *)PIXIS_BASE;
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
i &= 0x07; i &= 0x07;
switch (i) { switch (i) {
@ -590,8 +595,9 @@ get_board_ddr_clk(ulong dummy)
{ {
u8 i; u8 i;
ulong val = 0; ulong val = 0;
u8 *pixis_base = (u8 *)PIXIS_BASE;
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
i &= 0x38; i &= 0x38;
i >>= 3; i >>= 3;

11
board/freescale/mpc8544ds/mpc8544ds.c
View File

@ -391,11 +391,12 @@ get_board_sys_clk(ulong dummy)
{ {
u8 i, go_bit, rd_clks; u8 i, go_bit, rd_clks;
ulong val = 0; ulong val = 0;
u8 *pixis_base = (u8 *)PIXIS_BASE;
go_bit = in8(PIXIS_BASE + PIXIS_VCTL); go_bit = in_8(pixis_base + PIXIS_VCTL);
go_bit &= 0x01; go_bit &= 0x01;
rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0); rd_clks = in_8(pixis_base + PIXIS_VCFGEN0);
rd_clks &= 0x1C; rd_clks &= 0x1C;
/* /*
@ -406,11 +407,11 @@ get_board_sys_clk(ulong dummy)
if (go_bit) { if (go_bit) {
if (rd_clks == 0x1c) if (rd_clks == 0x1c)
i = in8(PIXIS_BASE + PIXIS_AUX); i = in_8(pixis_base + PIXIS_AUX);
else else
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
} else { } else {
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
} }
i &= 0x07; i &= 0x07;

22
board/freescale/mpc8572ds/mpc8572ds.c
View File

@ -432,19 +432,23 @@ ics307_clk_freq (unsigned char cw0, unsigned char cw1, unsigned char cw2)
unsigned long get_board_sys_clk(ulong dummy) unsigned long get_board_sys_clk(ulong dummy)
{ {
u8 *pixis_base = (u8 *)PIXIS_BASE;
return ics307_clk_freq ( return ics307_clk_freq (
in8(PIXIS_BASE + PIXIS_VSYSCLK0), in_8(pixis_base + PIXIS_VSYSCLK0),
in8(PIXIS_BASE + PIXIS_VSYSCLK1), in_8(pixis_base + PIXIS_VSYSCLK1),
in8(PIXIS_BASE + PIXIS_VSYSCLK2) in_8(pixis_base + PIXIS_VSYSCLK2)
); );
} }
unsigned long get_board_ddr_clk(ulong dummy) unsigned long get_board_ddr_clk(ulong dummy)
{ {
u8 *pixis_base = (u8 *)PIXIS_BASE;
return ics307_clk_freq ( return ics307_clk_freq (
in8(PIXIS_BASE + PIXIS_VDDRCLK0), in_8(pixis_base + PIXIS_VDDRCLK0),
in8(PIXIS_BASE + PIXIS_VDDRCLK1), in_8(pixis_base + PIXIS_VDDRCLK1),
in8(PIXIS_BASE + PIXIS_VDDRCLK2) in_8(pixis_base + PIXIS_VDDRCLK2)
); );
} }
#else #else
@ -452,8 +456,9 @@ unsigned long get_board_sys_clk(ulong dummy)
{ {
u8 i; u8 i;
ulong val = 0; ulong val = 0;
u8 *pixis_base = (u8 *)PIXIS_BASE;
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
i &= 0x07; i &= 0x07;
switch (i) { switch (i) {
@ -490,8 +495,9 @@ unsigned long get_board_ddr_clk(ulong dummy)
{ {
u8 i; u8 i;
ulong val = 0; ulong val = 0;
u8 *pixis_base = (u8 *)PIXIS_BASE;
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
i &= 0x38; i &= 0x38;
i >>= 3; i >>= 3;

25
board/freescale/mpc8610hpcd/mpc8610hpcd.c
View File

@ -55,16 +55,17 @@ int board_early_init_f(void)
int misc_init_r(void) int misc_init_r(void)
{ {
u8 tmp_val, version; u8 tmp_val, version;
u8 *pixis_base = (u8 *)PIXIS_BASE;
/*Do not use 8259PIC*/ /*Do not use 8259PIC*/
tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); tmp_val = in_8(pixis_base + PIXIS_BRDCFG0);
out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x80); out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x80);
/*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/ /*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/
version = in8(PIXIS_BASE + PIXIS_PVER); version = in_8(pixis_base + PIXIS_PVER);
if(version >= 0x07) { if(version >= 0x07) {
tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); tmp_val = in_8(pixis_base + PIXIS_BRDCFG0);
out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xbf); out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xbf);
} }
/* Using this for DIU init before the driver in linux takes over /* Using this for DIU init before the driver in linux takes over
@ -96,11 +97,12 @@ int checkboard(void)
{ {
volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
u8 *pixis_base = (u8 *)PIXIS_BASE;
printf ("Board: MPC8610HPCD, System ID: 0x%02x, " printf ("Board: MPC8610HPCD, System ID: 0x%02x, "
"System Version: 0x%02x, FPGA Version: 0x%02x\n", "System Version: 0x%02x, FPGA Version: 0x%02x\n",
in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
in8(PIXIS_BASE + PIXIS_PVER)); in_8(pixis_base + PIXIS_PVER));
mcm->abcr |= 0x00010000; /* 0 */ mcm->abcr |= 0x00010000; /* 0 */
mcm->hpmr3 = 0x80000008; /* 4c */ mcm->hpmr3 = 0x80000008; /* 4c */
@ -438,10 +440,9 @@ get_board_sys_clk(ulong dummy)
{ {
u8 i; u8 i;
ulong val = 0; ulong val = 0;
ulong a; u8 *pixis_base = (u8 *)PIXIS_BASE;
a = PIXIS_BASE + PIXIS_SPD; i = in_8(pixis_base + PIXIS_SPD);
i = in8(a);
i &= 0x07; i &= 0x07;
switch (i) { switch (i) {
@ -481,7 +482,9 @@ int board_eth_init(bd_t *bis)
void board_reset(void) void board_reset(void)
{ {
out8(PIXIS_BASE + PIXIS_RST, 0); u8 *pixis_base = (u8 *)PIXIS_BASE;
out_8(pixis_base + PIXIS_RST, 0);
while (1) while (1)
; ;

13
board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
View File

@ -69,9 +69,10 @@ void mpc8610hpcd_diu_init(void)
unsigned int pixel_format; unsigned int pixel_format;
unsigned char tmp_val; unsigned char tmp_val;
unsigned char pixis_arch; unsigned char pixis_arch;
u8 *pixis_base = (u8 *)PIXIS_BASE;
tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); tmp_val = in_8(pixis_base + PIXIS_BRDCFG0);
pixis_arch = in8(PIXIS_BASE + PIXIS_VER); pixis_arch = in_8(pixis_base + PIXIS_VER);
monitor_port = getenv("monitor"); monitor_port = getenv("monitor");
if (!strncmp(monitor_port, "0", 1)) { /* 0 - DVI */ if (!strncmp(monitor_port, "0", 1)) { /* 0 - DVI */
@ -82,28 +83,28 @@ void mpc8610hpcd_diu_init(void)
else else
pixel_format = 0x88883316; pixel_format = 0x88883316;
gamma_fix = 0; gamma_fix = 0;
out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x08); out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08);
} else if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */ } else if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */
xres = 1024; xres = 1024;
yres = 768; yres = 768;
pixel_format = 0x88883316; pixel_format = 0x88883316;
gamma_fix = 0; gamma_fix = 0;
out8(PIXIS_BASE + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10); out_8(pixis_base + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10);
} else if (!strncmp(monitor_port, "2", 1)) { /* 2 - Double link LVDS */ } else if (!strncmp(monitor_port, "2", 1)) { /* 2 - Double link LVDS */
xres = 1280; xres = 1280;
yres = 1024; yres = 1024;
pixel_format = 0x88883316; pixel_format = 0x88883316;
gamma_fix = 1; gamma_fix = 1;
out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xe7); out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xe7);
} else { /* DVI */ } else { /* DVI */
xres = 1280; xres = 1280;
yres = 1024; yres = 1024;
pixel_format = 0x88882317; pixel_format = 0x88882317;
gamma_fix = 0; gamma_fix = 0;
out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x08); out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08);
} }
fsl_diu_init(xres, pixel_format, gamma_fix, fsl_diu_init(xres, pixel_format, gamma_fix,

15
board/freescale/mpc8641hpcn/mpc8641hpcn.c
View File

@ -310,11 +310,12 @@ get_board_sys_clk(ulong dummy)
{ {
u8 i, go_bit, rd_clks; u8 i, go_bit, rd_clks;
ulong val = 0; ulong val = 0;
u8 *pixis_base = (u8 *)PIXIS_BASE;
go_bit = in8(PIXIS_BASE + PIXIS_VCTL); go_bit = in_8(pixis_base + PIXIS_VCTL);
go_bit &= 0x01; go_bit &= 0x01;
rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0); rd_clks = in_8(pixis_base + PIXIS_VCFGEN0);
rd_clks &= 0x1C; rd_clks &= 0x1C;
/* /*
@ -325,11 +326,11 @@ get_board_sys_clk(ulong dummy)
if (go_bit) { if (go_bit) {
if (rd_clks == 0x1c) if (rd_clks == 0x1c)
i = in8(PIXIS_BASE + PIXIS_AUX); i = in_8(pixis_base + PIXIS_AUX);
else else
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
} else { } else {
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
} }
i &= 0x07; i &= 0x07;
@ -373,7 +374,9 @@ int board_eth_init(bd_t *bis)
void board_reset(void) void board_reset(void)
{ {
out8(PIXIS_BASE + PIXIS_RST, 0); u8 *pixis_base = (u8 *)PIXIS_BASE;
out_8(pixis_base + PIXIS_RST, 0);
while (1) while (1)
; ;

22
board/freescale/p2020ds/p2020ds.c
View File

@ -479,10 +479,12 @@ unsigned long
calculate_board_sys_clk(ulong dummy) calculate_board_sys_clk(ulong dummy)
{ {
ulong val; ulong val;
u8 *pixis_base = (u8 *)PIXIS_BASE;
val = ics307_clk_freq( val = ics307_clk_freq(
in8(PIXIS_BASE + PIXIS_VSYSCLK0), in_8(pixis_base + PIXIS_VSYSCLK0),
in8(PIXIS_BASE + PIXIS_VSYSCLK1), in_8(pixis_base + PIXIS_VSYSCLK1),
in8(PIXIS_BASE + PIXIS_VSYSCLK2)); in_8(pixis_base + PIXIS_VSYSCLK2));
debug("sysclk val = %lu\n", val); debug("sysclk val = %lu\n", val);
return val; return val;
} }
@ -491,10 +493,12 @@ unsigned long
calculate_board_ddr_clk(ulong dummy) calculate_board_ddr_clk(ulong dummy)
{ {
ulong val; ulong val;
u8 *pixis_base = (u8 *)PIXIS_BASE;
val = ics307_clk_freq( val = ics307_clk_freq(
in8(PIXIS_BASE + PIXIS_VDDRCLK0), in_8(pixis_base + PIXIS_VDDRCLK0),
in8(PIXIS_BASE + PIXIS_VDDRCLK1), in_8(pixis_base + PIXIS_VDDRCLK1),
in8(PIXIS_BASE + PIXIS_VDDRCLK2)); in_8(pixis_base + PIXIS_VDDRCLK2));
debug("ddrclk val = %lu\n", val); debug("ddrclk val = %lu\n", val);
return val; return val;
} }
@ -503,8 +507,9 @@ unsigned long get_board_sys_clk(ulong dummy)
{ {
u8 i; u8 i;
ulong val = 0; ulong val = 0;
u8 *pixis_base = (u8 *)PIXIS_BASE;
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
i &= 0x07; i &= 0x07;
switch (i) { switch (i) {
@ -541,8 +546,9 @@ unsigned long get_board_ddr_clk(ulong dummy)
{ {
u8 i; u8 i;
ulong val = 0; ulong val = 0;
u8 *pixis_base = (u8 *)PIXIS_BASE;
i = in8(PIXIS_BASE + PIXIS_SPD); i = in_8(pixis_base + PIXIS_SPD);
i &= 0x38; i &= 0x38;
i >>= 3; i >>= 3;