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mecp5123: fix build error

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The mecp5123 board did not compile because the MSCAN Clock Control
Registers were missing; these got added, but as an array instead
of 4 individual registers. Adapt the code so it builds.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
This commit is contained in:
Wolfgang Denk 2009-06-14 20:58:46 +02:00
parent a9905db5d2
commit 0549353a6b
1 changed files with 5 additions and 8 deletions
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13
board/esd/mecp5123/mecp5123.c
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@ -79,6 +79,7 @@ int board_early_init_f(void)
{ {
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
u32 spridr; u32 spridr;
int i;
/* /*
* Initialize Local Window for NOR FLASH access * Initialize Local Window for NOR FLASH access
@ -129,14 +130,10 @@ int board_early_init_f(void)
/* /*
* Configure MSCAN clocks * Configure MSCAN clocks
*/ */
out_be32(&im->clk.m1ccr, 0x00300000); for (i=0; i<4; ++i) {
out_be32(&im->clk.m2ccr, 0x00300000); out_be32(&im->clk.msccr[i], 0x00300000);
out_be32(&im->clk.m3ccr, 0x00300000); out_be32(&im->clk.msccr[i], 0x00310000);
out_be32(&im->clk.m4ccr, 0x00300000); }
out_be32(&im->clk.m1ccr, 0x00310000);
out_be32(&im->clk.m2ccr, 0x00310000);
out_be32(&im->clk.m3ccr, 0x00310000);
out_be32(&im->clk.m4ccr, 0x00310000);
/* /*
* Configure GPIO's * Configure GPIO's