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[Blackfin][PATCH] minor cleanup

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This commit is contained in:
Aubrey Li 2007-03-12 12:11:55 +08:00
parent bfa5754a58
commit 0d93de1144
3 changed files with 10 additions and 10 deletions
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4
cpu/bf533/flush.S
View File

@ -90,7 +90,7 @@ ENTRY(_icplb_flush)
/* Save in extraction pattern for later deposit. */ /* Save in extraction pattern for later deposit. */
R3.H = R4.L << 0; R3.H = R4.L << 0;
/* So: /* So:
* R0 = Page start * R0 = Page start
* R1 = Page length (actually, offset into size/prefix tables) * R1 = Page length (actually, offset into size/prefix tables)
@ -264,7 +264,7 @@ ENTRY(_dcplb_flush)
* (b) on whether address bit A[x] is set. x is determined * (b) on whether address bit A[x] is set. x is determined
* by DCBS in DMEM_CONTROL * by DCBS in DMEM_CONTROL
*/ */
R2 = 0; /* Default to Bank A (Bank B would be 1)*/ R2 = 0; /* Default to Bank A (Bank B would be 1)*/
P0.L = (DMEM_CONTROL & 0xFFFF); P0.L = (DMEM_CONTROL & 0xFFFF);

10
cpu/bf533/start.S
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@ -82,7 +82,7 @@ _stext:
SSYNC; SSYNC;
/* As per HW reference manual DAG registers, /* As per HW reference manual DAG registers,
* DATA and Address resgister shall be zero'd * DATA and Address resgister shall be zero'd
* in initialization, after a reset state * in initialization, after a reset state
*/ */
r1 = 0; /* Data registers zero'd */ r1 = 0; /* Data registers zero'd */
@ -99,7 +99,7 @@ _stext:
p3 = 0; p3 = 0;
p4 = 0; p4 = 0;
p5 = 0; p5 = 0;
i0 = 0; /* DAG Registers zero'd */ i0 = 0; /* DAG Registers zero'd */
i1 = 0; i1 = 0;
i2 = 0; i2 = 0;
@ -150,7 +150,7 @@ no_soft_reset:
r1 = 0; r1 = 0;
LSETUP(4,4) lc0 = p1; LSETUP(4,4) lc0 = p1;
[ p0 ++ ] = r1; [ p0 ++ ] = r1;
p0.h = hi(SIC_IWR); p0.h = hi(SIC_IWR);
p0.l = lo(SIC_IWR); p0.l = lo(SIC_IWR);
r0.l = 0x1; r0.l = 0x1;
@ -259,8 +259,8 @@ DMA:
/* Set Destination DMAConfig = DMA Enable, /* Set Destination DMAConfig = DMA Enable,
Memory Write, 8-Bit Transfers, 1-D DMA, Flow - Stop, IOC */ Memory Write, 8-Bit Transfers, 1-D DMA, Flow - Stop, IOC */
W[P1+OFFSET_(MDMA_D0_CONFIG)] = R4; W[P1+OFFSET_(MDMA_D0_CONFIG)] = R4;
WAIT_DMA_DONE: WAIT_DMA_DONE:
p0.h = hi(MDMA_D0_IRQ_STATUS); p0.h = hi(MDMA_D0_IRQ_STATUS);
p0.l = lo(MDMA_D0_IRQ_STATUS); p0.l = lo(MDMA_D0_IRQ_STATUS);
R0 = W[P0](Z); R0 = W[P0](Z);

6
include/configs/bf533-stamp.h
View File

@ -120,7 +120,7 @@
*/ */
#define CFG_FLASH_CFI /* The flash is CFI compatible */ #define CFG_FLASH_CFI /* The flash is CFI compatible */
#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
#define CFG_FLASH_CFI_AMD_RESET #define CFG_FLASH_CFI_AMD_RESET
#define CFG_FLASH_BASE 0x20000000 #define CFG_FLASH_BASE 0x20000000
@ -228,7 +228,7 @@
#endif #endif
/* configuration lookup from the BOOTP/DHCP server, */ /* configuration lookup from the BOOTP/DHCP server, */
/* but not try to load any image using TFTP */ /* but not try to load any image using TFTP */
#define CONFIG_BOOTDELAY 5 #define CONFIG_BOOTDELAY 5
#define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, currently its disabled */ #define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, currently its disabled */
@ -289,7 +289,7 @@
"$(rootpath) console=ttyBF0,57600\0" \ "$(rootpath) console=ttyBF0,57600\0" \
"addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):" \ "addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):" \
"$(gatewayip):$(netmask):$(hostname):eth0:off\0" \ "$(gatewayip):$(netmask):$(hostname):eth0:off\0" \
"ramboot=tftpboot $(loadaddr) linux; " \ "ramboot=tftpboot $(loadaddr) linux; " \
"run ramargs;run addip;bootelf\0" \ "run ramargs;run addip;bootelf\0" \
"nfsboot=tftpboot $(loadaddr) linux; " \ "nfsboot=tftpboot $(loadaddr) linux; " \
"run nfsargs;run addip;bootelf\0" \ "run nfsargs;run addip;bootelf\0" \