minix/u-boot
1
0
Fork 0
mirror of https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git synced 2025-09-10 20:52:22 -04:00
Code Issues Packages Projects Releases Wiki Activity

Code cleanup

Browse Source
This commit is contained in:
Wolfgang Denk 2006-08-27 18:10:01 +02:00
parent 3b0ff842bf
commit 16850919ff
9 changed files with 50 additions and 48 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
CHANGELOG
View File

@ -2,6 +2,8 @@
Changes since U-Boot 1.1.4: Changes since U-Boot 1.1.4:
====================================================================== ======================================================================
* Code cleanup
* Update for MCC200 / PRS200 boards: * Update for MCC200 / PRS200 boards:
- auto-adjust console device for Linux. - auto-adjust console device for Linux.
- fix typos. - fix typos.

60
board/amcc/common/flash.c
View File

@ -35,7 +35,7 @@
#include <ppc4xx.h> #include <ppc4xx.h>
#include <asm/processor.h> #include <asm/processor.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Functions * Functions
@ -76,7 +76,7 @@ void flash_print_info(flash_info_t * info)
case FLASH_MAN_SST: case FLASH_MAN_SST:
printf("SST "); printf("SST ");
break; break;
case FLASH_MAN_MX: case FLASH_MAN_MX:
printf ("MACRONIX "); printf ("MACRONIX ");
break; break;
default: default:
@ -223,75 +223,75 @@ static ulong flash_get_size(vu_long * addr, flash_info_t * info)
return (0); /* no or unknown flash */ return (0); /* no or unknown flash */
} }
value = addr2[1]; /* device ID */ value = addr2[1]; /* device ID */
DEBUGF("\nFLASH DEVICEID: %x\n", value); DEBUGF("\nFLASH DEVICEID: %x\n", value);
switch (value) { switch (value) {
case (CFG_FLASH_WORD_SIZE) AMD_ID_LV040B: case (CFG_FLASH_WORD_SIZE) AMD_ID_LV040B:
info->flash_id += FLASH_AM040; info->flash_id += FLASH_AM040;
info->sector_count = 8; info->sector_count = 8;
info->size = 0x0080000; /* => 512 ko */ info->size = 0x0080000; /* => 512 KiB */
break; break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_F040B: case (CFG_FLASH_WORD_SIZE) AMD_ID_F040B:
info->flash_id += FLASH_AM040; info->flash_id += FLASH_AM040;
info->sector_count = 8; info->sector_count = 8;
info->size = 0x0080000; /* => 512 ko */ info->size = 0x0080000; /* => 512 KiB */
break; break;
case (CFG_FLASH_WORD_SIZE) STM_ID_M29W040B: case (CFG_FLASH_WORD_SIZE) STM_ID_M29W040B:
info->flash_id += FLASH_AM040; info->flash_id += FLASH_AM040;
info->sector_count = 8; info->sector_count = 8;
info->size = 0x0080000; /* => 512 ko */ info->size = 0x0080000; /* => 512 KiB */
break; break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_F016D: case (CFG_FLASH_WORD_SIZE) AMD_ID_F016D:
info->flash_id += FLASH_AMD016; info->flash_id += FLASH_AMD016;
info->sector_count = 32; info->sector_count = 32;
info->size = 0x00200000; info->size = 0x00200000; /* => 2 MiB */
break; /* => 2 MB */ break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_LV033C: case (CFG_FLASH_WORD_SIZE) AMD_ID_LV033C:
info->flash_id += FLASH_AMDLV033C; info->flash_id += FLASH_AMDLV033C;
info->sector_count = 64; info->sector_count = 64;
info->size = 0x00400000; info->size = 0x00400000; /* => 4 MiB */
break; /* => 4 MB */ break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400T: case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400T:
info->flash_id += FLASH_AM400T; info->flash_id += FLASH_AM400T;
info->sector_count = 11; info->sector_count = 11;
info->size = 0x00080000; info->size = 0x00080000; /* => 512 KiB */
break; /* => 0.5 MB */ break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400B: case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400B:
info->flash_id += FLASH_AM400B; info->flash_id += FLASH_AM400B;
info->sector_count = 11; info->sector_count = 11;
info->size = 0x00080000; info->size = 0x00080000; /* => 512 KiB */
break; /* => 0.5 MB */ break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800T: case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800T:
info->flash_id += FLASH_AM800T; info->flash_id += FLASH_AM800T;
info->sector_count = 19; info->sector_count = 19;
info->size = 0x00100000; info->size = 0x00100000; /* => 1 MiB */
break; /* => 1 MB */ break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800B: case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800B:
info->flash_id += FLASH_AM800B; info->flash_id += FLASH_AM800B;
info->sector_count = 19; info->sector_count = 19;
info->size = 0x00100000; info->size = 0x00100000; /* => 1 MiB */
break; /* => 1 MB */ break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160T: case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160T:
info->flash_id += FLASH_AM160T; info->flash_id += FLASH_AM160T;
info->sector_count = 35; info->sector_count = 35;
info->size = 0x00200000; info->size = 0x00200000; /* => 2 MiB */
break; /* => 2 MB */ break;
case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160B: case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160B:
info->flash_id += FLASH_AM160B; info->flash_id += FLASH_AM160B;
info->sector_count = 35; info->sector_count = 35;
info->size = 0x00200000; info->size = 0x00200000; /* => 2 MiB */
break; /* => 2 MB */ break;
default: default:
info->flash_id = FLASH_UNKNOWN; info->flash_id = FLASH_UNKNOWN;
@ -306,7 +306,7 @@ static ulong flash_get_size(vu_long * addr, flash_info_t * info)
info->start[i] = base + (i * 0x00010000); info->start[i] = base + (i * 0x00010000);
} else { } else {
if (info->flash_id & FLASH_BTYPE) { if (info->flash_id & FLASH_BTYPE) {
/* set sector offsets for bottom boot block type */ /* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000; info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00004000; info->start[1] = base + 0x00004000;
info->start[2] = base + 0x00006000; info->start[2] = base + 0x00006000;
@ -316,7 +316,7 @@ static ulong flash_get_size(vu_long * addr, flash_info_t * info)
base + (i * 0x00010000) - 0x00030000; base + (i * 0x00010000) - 0x00030000;
} }
} else { } else {
/* set sector offsets for top boot block type */ /* set sector offsets for top boot block type */
i = info->sector_count - 1; i = info->sector_count - 1;
info->start[i--] = base + info->size - 0x00004000; info->start[i--] = base + info->size - 0x00004000;
info->start[i--] = base + info->size - 0x00006000; info->start[i--] = base + info->size - 0x00006000;
@ -666,7 +666,7 @@ static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
return (0); /* no or unknown flash */ return (0); /* no or unknown flash */
} }
value = addr2[1]; /* device ID */ value = addr2[1]; /* device ID */
DEBUGF("\nFLASH DEVICEID: %x\n", value); DEBUGF("\nFLASH DEVICEID: %x\n", value);
@ -675,17 +675,17 @@ static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T: case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
info->flash_id += FLASH_AM320T; info->flash_id += FLASH_AM320T;
info->sector_count = 71; info->sector_count = 71;
info->size = 0x00400000; break; /* => 4 MB */ info->size = 0x00400000; break; /* => 4 MiB */
case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B: case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
info->flash_id += FLASH_AM320B; info->flash_id += FLASH_AM320B;
info->sector_count = 71; info->sector_count = 71;
info->size = 0x00400000; break; /* => 4 MB */ info->size = 0x00400000; break; /* => 4 MiB */
case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT: case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT:
info->flash_id += FLASH_STMW320DT; info->flash_id += FLASH_STMW320DT;
info->sector_count = 67; info->sector_count = 67;
info->size = 0x00400000; break; /* => 4 MB */ info->size = 0x00400000; break; /* => 4 MiB */
case (CFG_FLASH_WORD_SIZE)MX_ID_LV320T: case (CFG_FLASH_WORD_SIZE)MX_ID_LV320T:
info->flash_id += FLASH_MXLV320T; info->flash_id += FLASH_MXLV320T;
@ -743,7 +743,7 @@ static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
info->start[i] = base + i * 0x00010000; info->start[i] = base + i * 0x00010000;
} else { } else {
if (info->flash_id & FLASH_BTYPE) { if (info->flash_id & FLASH_BTYPE) {
/* set sector offsets for bottom boot block type */ /* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000; info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00004000; info->start[1] = base + 0x00004000;
info->start[2] = base + 0x00006000; info->start[2] = base + 0x00006000;
@ -753,7 +753,7 @@ static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
base + (i * 0x00010000) - 0x00030000; base + (i * 0x00010000) - 0x00030000;
} }
} else { } else {
/* set sector offsets for top boot block type */ /* set sector offsets for top boot block type */
i = info->sector_count - 1; i = info->sector_count - 1;
info->start[i--] = base + info->size - 0x00004000; info->start[i--] = base + info->size - 0x00004000;
info->start[i--] = base + info->size - 0x00006000; info->start[i--] = base + info->size - 0x00006000;

8
board/cpu87/cpu87.c
View File

@ -294,15 +294,15 @@ long int initdram (int board_type)
*/ */
size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL, size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
(uchar *) CFG_SDRAM_BASE); (uchar *) CFG_SDRAM_BASE);
size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL, size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
(uchar *) CFG_SDRAM_BASE); (uchar *) CFG_SDRAM_BASE);
size10 = try_init (memctl, CFG_PSDMR_10COL, CFG_OR2_10COL, size10 = try_init (memctl, CFG_PSDMR_10COL, CFG_OR2_10COL,
(uchar *) CFG_SDRAM_BASE); (uchar *) CFG_SDRAM_BASE);
psize = max(size8,max(size9,size10)); psize = max(size8,max(size9,size10));
if (psize == size8) { if (psize == size8) {
psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL, psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
(uchar *) CFG_SDRAM_BASE); (uchar *) CFG_SDRAM_BASE);

4
board/mcc200/mcc200.c
View File

@ -265,8 +265,8 @@ int misc_init_r (void)
*(volatile int*)MPC5XXX_CS0_CFG &= ~(1 << 6); *(volatile int*)MPC5XXX_CS0_CFG &= ~(1 << 6);
printf ("Warning: Only 32 of 64 MB of Flash are accessible from U-Boot\n"); printf ("Warning: Only 32 of 64 MB of Flash are accessible from U-Boot\n");
flash_info[0].size = 32 << 20; flash_info[0].size = 32 << 20;
for (snum = 0, flash_sup_end = gd->bd->bi_flashstart + (32<<20); for (snum = 0, flash_sup_end = gd->bd->bi_flashstart + (32<<20);
flash_info[0].start[snum] < flash_sup_end; flash_info[0].start[snum] < flash_sup_end;
snum++); snum++);
flash_info[0].sector_count = snum; flash_info[0].sector_count = snum;
} }

6
board/tqm5200/tqm5200.c
View File

@ -743,7 +743,7 @@ int board_early_init_f (void)
/* Read in TIMER_3 pin status */ /* Read in TIMER_3 pin status */
timer3_status = *(vu_long *)MPC5XXX_GPT3_STATUS; timer3_status = *(vu_long *)MPC5XXX_GPT3_STATUS;
#ifdef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED #ifdef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED
/* Force silent console mode if S1 switch /* Force silent console mode if S1 switch
* is in closed position (TIMER_3 pin status is LOW). */ * is in closed position (TIMER_3 pin status is LOW). */
@ -757,5 +757,5 @@ int board_early_init_f (void)
return 0; return 0;
} }
#endif #endif /* CONFIG_FO300 */
#endif #endif /* CONFIG_BOARD_EARLY_INIT_F */

2
cpu/i386/sc520.c
View File

@ -149,7 +149,7 @@ unsigned long init_sc520_dram(void)
/* these memory control registers are set up in the assember part, /* these memory control registers are set up in the assember part,
* in sc520_asm.S, during 'mem_init'. If we muck with them here, * in sc520_asm.S, during 'mem_init'. If we muck with them here,
* after we are running a stack in RAM, we have troubles. Besides, * after we are running a stack in RAM, we have troubles. Besides,
* these refresh and delay values are better ? simply specified * these refresh and delay values are better ? simply specified
* outright in the include/configs/{cfg} file since the HW designer * outright in the include/configs/{cfg} file since the HW designer
* simply dictates it. * simply dictates it.
*/ */

12
cpu/i386/sc520_asm.S
View File

@ -462,7 +462,7 @@ emptybank:
#if defined CFG_SDRAM_DRCTMCTL #if defined CFG_SDRAM_DRCTMCTL
/* just have your hardware desinger _GIVE_ you what you need here! */ /* just have your hardware desinger _GIVE_ you what you need here! */
movl $DRCTMCTL, %edi movl $DRCTMCTL, %edi
movb $CFG_SDRAM_DRCTMCTL,%al movb $CFG_SDRAM_DRCTMCTL,%al
movb (%edi), %al movb (%edi), %al
#else #else
@ -477,7 +477,7 @@ emptybank:
#ifdef CFG_SDRAM_CAS_LATENCY_3T #ifdef CFG_SDRAM_CAS_LATENCY_3T
orb $0x10, %al orb $0x10, %al
#endif #endif
movb %al, (%edi) movb %al, (%edi)
#endif #endif
#endif #endif
movl $DRCCTL, %edi /* DRAM Control register */ movl $DRCCTL, %edi /* DRAM Control register */
@ -537,7 +537,7 @@ bank0: movl (%edi), %eax
movl %eax, %ebx movl %eax, %ebx
done: done:
movl %ebx, %eax movl %ebx, %eax
#if CFG_SDRAM_ECC_ENABLE #if CFG_SDRAM_ECC_ENABLE
@ -547,7 +547,7 @@ done:
movl $0x1, %edi movl $0x1, %edi
memtest0: memtest0:
movb $0xa5, (%edi) movb $0xa5, (%edi)
cmpb $0xa5, (%edi) cmpb $0xa5, (%edi)
jne out jne out
shrl $1, %ecx shrl $1, %ecx
andl %ecx,%ecx andl %ecx,%ecx
@ -571,11 +571,11 @@ set_ecc:
/* enable NMI mapping for ECC */ /* enable NMI mapping for ECC */
movl $ECCINT, %edi movl $ECCINT, %edi
mov $0x10, %al mov $0x10, %al
movb %al, (%edi) movb %al, (%edi)
/* Turn on ECC */ /* Turn on ECC */
movl $ECCCTL, %edi movl $ECCCTL, %edi
mov $0x05, %al mov $0x05, %al
movb %al, (%edi) movb %al, (%edi)
#endif #endif
out: out:
movl %ebx, %eax movl %ebx, %eax

2
cpu/ppc4xx/440spe_pcie.c
View File

@ -169,7 +169,7 @@ static void ppc440spe_setup_utl(u32 port) {
break; break;
} }
utl_base = (unsigned int *)(CFG_PCIE_BASE + 0x1000 * port); utl_base = (unsigned int *)(CFG_PCIE_BASE + 0x1000 * port);
/* /*
* Set buffer allocations and then assert VRB and TXE. * Set buffer allocations and then assert VRB and TXE.
*/ */

2
include/configs/CPU87.h
View File

@ -527,7 +527,7 @@
PSDMR_LDOTOPRE_1C |\ PSDMR_LDOTOPRE_1C |\
PSDMR_WRC_1C |\ PSDMR_WRC_1C |\
PSDMR_CL_2) PSDMR_CL_2)
/* /*
* Init Memory Controller: * Init Memory Controller:
* *