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mxs: Reowork SPL to use 'mxs' prefix for methods

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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This commit is contained in:
Otavio Salvador 2012-08-05 09:05:32 +00:00 committed by Albert ARIBAUD
parent 9c471142bc
commit 1e0cf5c34b
10 changed files with 116 additions and 116 deletions
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8
arch/arm/cpu/arm926ejs/mxs/mx28.c
View File

@ -222,8 +222,8 @@ static const char *get_cpu_rev(void)
int print_cpuinfo(void) int print_cpuinfo(void)
{ {
struct mx28_spl_data *data = (struct mx28_spl_data *) struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
printf("CPU: Freescale i.MX%s rev%s at %d MHz\n", printf("CPU: Freescale i.MX%s rev%s at %d MHz\n",
get_cpu_type(), get_cpu_type(),
@ -322,8 +322,8 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
int mx28_dram_init(void) int mx28_dram_init(void)
{ {
struct mx28_spl_data *data = (struct mx28_spl_data *) struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
if (data->mem_dram_size == 0) { if (data->mem_dram_size == 0) {
printf("MX28:\n" printf("MX28:\n"

14
arch/arm/cpu/arm926ejs/mxs/mx28_init.h → arch/arm/cpu/arm926ejs/mxs/mxs_init.h
View File

@ -28,18 +28,18 @@
void early_delay(int delay); void early_delay(int delay);
void mx28_power_init(void); void mxs_power_init(void);
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT #ifdef CONFIG_SPL_MX28_PSWITCH_WAIT
void mx28_power_wait_pswitch(void); void mxs_power_wait_pswitch(void);
#else #else
static inline void mx28_power_wait_pswitch(void) { } static inline void mxs_power_wait_pswitch(void) { }
#endif #endif
void mx28_mem_init(void); void mxs_mem_init(void);
uint32_t mx28_mem_get_size(void); uint32_t mxs_mem_get_size(void);
void mx28_lradc_init(void); void mxs_lradc_init(void);
void mx28_lradc_enable_batt_measurement(void); void mxs_lradc_enable_batt_measurement(void);
#endif /* __M28_INIT_H__ */ #endif /* __M28_INIT_H__ */

20
arch/arm/cpu/arm926ejs/mxs/spl_boot.c
View File

@ -31,7 +31,7 @@
#include <asm/arch/sys_proto.h> #include <asm/arch/sys_proto.h>
#include <asm/gpio.h> #include <asm/gpio.h>
#include "mx28_init.h" #include "mxs_init.h"
/* /*
* This delay function is intended to be used only in early stage of boot, where * This delay function is intended to be used only in early stage of boot, where
@ -58,7 +58,7 @@ const iomux_cfg_t iomux_boot[] = {
MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD, MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
}; };
uint8_t mx28_get_bootmode_index(void) uint8_t mxs_get_bootmode_index(void)
{ {
uint8_t bootmode = 0; uint8_t bootmode = 0;
int i; int i;
@ -92,22 +92,22 @@ uint8_t mx28_get_bootmode_index(void)
return i; return i;
} }
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size) const unsigned int iomux_size)
{ {
struct mx28_spl_data *data = (struct mx28_spl_data *) struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
uint8_t bootmode = mx28_get_bootmode_index(); uint8_t bootmode = mxs_get_bootmode_index();
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size); mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init(); mxs_power_init();
mx28_mem_init(); mxs_mem_init();
data->mem_dram_size = mx28_mem_get_size(); data->mem_dram_size = mxs_mem_get_size();
data->boot_mode_idx = bootmode; data->boot_mode_idx = bootmode;
mx28_power_wait_pswitch(); mxs_power_wait_pswitch();
} }
/* Support aparatus */ /* Support aparatus */

6
arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
View File

@ -28,9 +28,9 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include "mx28_init.h" #include "mxs_init.h"
void mx28_lradc_init(void) void mxs_lradc_init(void)
{ {
struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
@ -49,7 +49,7 @@ void mx28_lradc_init(void)
LRADC_CTRL4_LRADC6SELECT_CHANNEL10); LRADC_CTRL4_LRADC6SELECT_CHANNEL10);
} }
void mx28_lradc_enable_batt_measurement(void) void mxs_lradc_enable_batt_measurement(void)
{ {
struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;

30
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
View File

@ -29,7 +29,7 @@
#include <asm/arch/iomux-mx28.h> #include <asm/arch/iomux-mx28.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include "mx28_init.h" #include "mxs_init.h"
static uint32_t mx28_dram_vals[] = { static uint32_t mx28_dram_vals[] = {
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
@ -82,23 +82,23 @@ static uint32_t mx28_dram_vals[] = {
0x00000000, 0x00010001 0x00000000, 0x00010001
}; };
void __mx28_adjust_memory_params(uint32_t *dram_vals) void __mxs_adjust_memory_params(uint32_t *dram_vals)
{ {
} }
void mx28_adjust_memory_params(uint32_t *dram_vals) void mxs_adjust_memory_params(uint32_t *dram_vals)
__attribute__((weak, alias("__mx28_adjust_memory_params"))); __attribute__((weak, alias("__mxs_adjust_memory_params")));
void init_mx28_200mhz_ddr2(void) void init_mx28_200mhz_ddr2(void)
{ {
int i; int i;
mx28_adjust_memory_params(mx28_dram_vals); mxs_adjust_memory_params(mx28_dram_vals);
for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++) for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i)); writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
} }
void mx28_mem_init_clock(void) void mxs_mem_init_clock(void)
{ {
struct mxs_clkctrl_regs *clkctrl_regs = struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@ -129,7 +129,7 @@ void mx28_mem_init_clock(void)
early_delay(10000); early_delay(10000);
} }
void mx28_mem_setup_cpu_and_hbus(void) void mxs_mem_setup_cpu_and_hbus(void)
{ {
struct mxs_clkctrl_regs *clkctrl_regs = struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@ -161,7 +161,7 @@ void mx28_mem_setup_cpu_and_hbus(void)
early_delay(15000); early_delay(15000);
} }
void mx28_mem_setup_vdda(void) void mxs_mem_setup_vdda(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -172,7 +172,7 @@ void mx28_mem_setup_vdda(void)
&power_regs->hw_power_vddactrl); &power_regs->hw_power_vddactrl);
} }
void mx28_mem_setup_vddd(void) void mxs_mem_setup_vddd(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -183,7 +183,7 @@ void mx28_mem_setup_vddd(void)
&power_regs->hw_power_vdddctrl); &power_regs->hw_power_vdddctrl);
} }
uint32_t mx28_mem_get_size(void) uint32_t mxs_mem_get_size(void)
{ {
uint32_t sz, da; uint32_t sz, da;
uint32_t *vt = (uint32_t *)0x20; uint32_t *vt = (uint32_t *)0x20;
@ -202,7 +202,7 @@ uint32_t mx28_mem_get_size(void)
return sz; return sz;
} }
void mx28_mem_init(void) void mxs_mem_init(void)
{ {
struct mxs_clkctrl_regs *clkctrl_regs = struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@ -219,9 +219,9 @@ void mx28_mem_init(void)
early_delay(11000); early_delay(11000);
mx28_mem_init_clock(); mxs_mem_init_clock();
mx28_mem_setup_vdda(); mxs_mem_setup_vdda();
/* /*
* Configure the DRAM registers * Configure the DRAM registers
@ -242,9 +242,9 @@ void mx28_mem_init(void)
while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20))) while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
; ;
mx28_mem_setup_vddd(); mxs_mem_setup_vddd();
early_delay(10000); early_delay(10000);
mx28_mem_setup_cpu_and_hbus(); mxs_mem_setup_cpu_and_hbus();
} }

142
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
View File

@ -28,9 +28,9 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include "mx28_init.h" #include "mxs_init.h"
void mx28_power_clock2xtal(void) void mxs_power_clock2xtal(void)
{ {
struct mxs_clkctrl_regs *clkctrl_regs = struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@ -40,7 +40,7 @@ void mx28_power_clock2xtal(void)
&clkctrl_regs->hw_clkctrl_clkseq_set); &clkctrl_regs->hw_clkctrl_clkseq_set);
} }
void mx28_power_clock2pll(void) void mxs_power_clock2pll(void)
{ {
struct mxs_clkctrl_regs *clkctrl_regs = struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@ -52,7 +52,7 @@ void mx28_power_clock2pll(void)
CLKCTRL_CLKSEQ_BYPASS_CPU); CLKCTRL_CLKSEQ_BYPASS_CPU);
} }
void mx28_power_clear_auto_restart(void) void mxs_power_clear_auto_restart(void)
{ {
struct mxs_rtc_regs *rtc_regs = struct mxs_rtc_regs *rtc_regs =
(struct mxs_rtc_regs *)MXS_RTC_BASE; (struct mxs_rtc_regs *)MXS_RTC_BASE;
@ -85,7 +85,7 @@ void mx28_power_clear_auto_restart(void)
; ;
} }
void mx28_power_set_linreg(void) void mxs_power_set_linreg(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -104,7 +104,7 @@ void mx28_power_set_linreg(void)
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW); POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW);
} }
int mx28_get_batt_volt(void) int mxs_get_batt_volt(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -115,16 +115,16 @@ int mx28_get_batt_volt(void)
return volt; return volt;
} }
int mx28_is_batt_ready(void) int mxs_is_batt_ready(void)
{ {
return (mx28_get_batt_volt() >= 3600); return (mxs_get_batt_volt() >= 3600);
} }
int mx28_is_batt_good(void) int mxs_is_batt_good(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t volt = mx28_get_batt_volt(); uint32_t volt = mxs_get_batt_volt();
if ((volt >= 2400) && (volt <= 4300)) if ((volt >= 2400) && (volt <= 4300))
return 1; return 1;
@ -145,7 +145,7 @@ int mx28_is_batt_good(void)
early_delay(500000); early_delay(500000);
volt = mx28_get_batt_volt(); volt = mxs_get_batt_volt();
if (volt >= 3500) if (volt >= 3500)
return 0; return 0;
@ -160,7 +160,7 @@ int mx28_is_batt_good(void)
return 0; return 0;
} }
void mx28_power_setup_5v_detect(void) void mxs_power_setup_5v_detect(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -172,7 +172,7 @@ void mx28_power_setup_5v_detect(void)
POWER_5VCTRL_PWRUP_VBUS_CMPS); POWER_5VCTRL_PWRUP_VBUS_CMPS);
} }
void mx28_src_power_init(void) void mxs_src_power_init(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -203,7 +203,7 @@ void mx28_src_power_init(void)
clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER); clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
} }
void mx28_power_init_4p2_params(void) void mxs_power_init_4p2_params(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -227,7 +227,7 @@ void mx28_power_init_4p2_params(void)
0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET); 0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
} }
void mx28_enable_4p2_dcdc_input(int xfer) void mxs_enable_4p2_dcdc_input(int xfer)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -323,7 +323,7 @@ void mx28_enable_4p2_dcdc_input(int xfer)
POWER_CTRL_ENIRQ_VDD5V_DROOP); POWER_CTRL_ENIRQ_VDD5V_DROOP);
} }
void mx28_power_init_4p2_regulator(void) void mxs_power_init_4p2_regulator(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -346,7 +346,7 @@ void mx28_power_init_4p2_regulator(void)
* gradually to avoid large inrush current from the 5V cable which can * gradually to avoid large inrush current from the 5V cable which can
* cause transients/problems * cause transients/problems
*/ */
mx28_enable_4p2_dcdc_input(0); mxs_enable_4p2_dcdc_input(0);
if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) { if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) {
/* /*
@ -407,7 +407,7 @@ void mx28_power_init_4p2_regulator(void)
writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr); writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr);
} }
void mx28_power_init_dcdc_4p2_source(void) void mxs_power_init_dcdc_4p2_source(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -417,7 +417,7 @@ void mx28_power_init_dcdc_4p2_source(void)
hang(); hang();
} }
mx28_enable_4p2_dcdc_input(1); mxs_enable_4p2_dcdc_input(1);
if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) { if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) {
clrbits_le32(&power_regs->hw_power_dcdc4p2, clrbits_le32(&power_regs->hw_power_dcdc4p2,
@ -429,7 +429,7 @@ void mx28_power_init_dcdc_4p2_source(void)
} }
} }
void mx28_power_enable_4p2(void) void mxs_power_enable_4p2(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -451,11 +451,11 @@ void mx28_power_enable_4p2(void)
setbits_le32(&power_regs->hw_power_vddioctrl, setbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_DISABLE_FET | POWER_VDDIOCTRL_PWDN_BRNOUT); POWER_VDDIOCTRL_DISABLE_FET | POWER_VDDIOCTRL_PWDN_BRNOUT);
mx28_power_init_4p2_params(); mxs_power_init_4p2_params();
mx28_power_init_4p2_regulator(); mxs_power_init_4p2_regulator();
/* Shutdown battery (none present) */ /* Shutdown battery (none present) */
if (!mx28_is_batt_ready()) { if (!mxs_is_batt_ready()) {
clrbits_le32(&power_regs->hw_power_dcdc4p2, clrbits_le32(&power_regs->hw_power_dcdc4p2,
POWER_DCDC4P2_BO_MASK); POWER_DCDC4P2_BO_MASK);
writel(POWER_CTRL_DCDC4P2_BO_IRQ, writel(POWER_CTRL_DCDC4P2_BO_IRQ,
@ -464,7 +464,7 @@ void mx28_power_enable_4p2(void)
&power_regs->hw_power_ctrl_clr); &power_regs->hw_power_ctrl_clr);
} }
mx28_power_init_dcdc_4p2_source(); mxs_power_init_dcdc_4p2_source();
writel(vdddctrl, &power_regs->hw_power_vdddctrl); writel(vdddctrl, &power_regs->hw_power_vdddctrl);
early_delay(20); early_delay(20);
@ -488,7 +488,7 @@ void mx28_power_enable_4p2(void)
&power_regs->hw_power_charge_clr); &power_regs->hw_power_charge_clr);
} }
void mx28_boot_valid_5v(void) void mxs_boot_valid_5v(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -508,10 +508,10 @@ void mx28_boot_valid_5v(void)
writel(POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_VDD5V_GT_VDDIO_IRQ, writel(POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_VDD5V_GT_VDDIO_IRQ,
&power_regs->hw_power_ctrl_clr); &power_regs->hw_power_ctrl_clr);
mx28_power_enable_4p2(); mxs_power_enable_4p2();
} }
void mx28_powerdown(void) void mxs_powerdown(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -520,7 +520,7 @@ void mx28_powerdown(void)
&power_regs->hw_power_reset); &power_regs->hw_power_reset);
} }
void mx28_batt_boot(void) void mxs_batt_boot(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -542,7 +542,7 @@ void mx28_batt_boot(void)
clrsetbits_le32(&power_regs->hw_power_minpwr, clrsetbits_le32(&power_regs->hw_power_minpwr,
POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS); POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS);
mx28_power_set_linreg(); mxs_power_set_linreg();
clrbits_le32(&power_regs->hw_power_vdddctrl, clrbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG); POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG);
@ -564,7 +564,7 @@ void mx28_batt_boot(void)
0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET); 0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
} }
void mx28_handle_5v_conflict(void) void mxs_handle_5v_conflict(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -577,26 +577,26 @@ void mx28_handle_5v_conflict(void)
tmp = readl(&power_regs->hw_power_sts); tmp = readl(&power_regs->hw_power_sts);
if (tmp & POWER_STS_VDDIO_BO) { if (tmp & POWER_STS_VDDIO_BO) {
mx28_powerdown(); mxs_powerdown();
break; break;
} }
if (tmp & POWER_STS_VDD5V_GT_VDDIO) { if (tmp & POWER_STS_VDD5V_GT_VDDIO) {
mx28_boot_valid_5v(); mxs_boot_valid_5v();
break; break;
} else { } else {
mx28_powerdown(); mxs_powerdown();
break; break;
} }
if (tmp & POWER_STS_PSWITCH_MASK) { if (tmp & POWER_STS_PSWITCH_MASK) {
mx28_batt_boot(); mxs_batt_boot();
break; break;
} }
} }
} }
void mx28_5v_boot(void) void mxs_5v_boot(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -606,20 +606,20 @@ void mx28_5v_boot(void)
* but their implementation always returns 1 so we omit it here. * but their implementation always returns 1 so we omit it here.
*/ */
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
mx28_boot_valid_5v(); mxs_boot_valid_5v();
return; return;
} }
early_delay(1000); early_delay(1000);
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
mx28_boot_valid_5v(); mxs_boot_valid_5v();
return; return;
} }
mx28_handle_5v_conflict(); mxs_handle_5v_conflict();
} }
void mx28_init_batt_bo(void) void mxs_init_batt_bo(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -633,7 +633,7 @@ void mx28_init_batt_bo(void)
writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr); writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr);
} }
void mx28_switch_vddd_to_dcdc_source(void) void mxs_switch_vddd_to_dcdc_source(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -647,7 +647,7 @@ void mx28_switch_vddd_to_dcdc_source(void)
POWER_VDDDCTRL_DISABLE_STEPPING); POWER_VDDDCTRL_DISABLE_STEPPING);
} }
void mx28_power_configure_power_source(void) void mxs_power_configure_power_source(void)
{ {
int batt_ready, batt_good; int batt_ready, batt_good;
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
@ -655,15 +655,15 @@ void mx28_power_configure_power_source(void)
struct mxs_lradc_regs *lradc_regs = struct mxs_lradc_regs *lradc_regs =
(struct mxs_lradc_regs *)MXS_LRADC_BASE; (struct mxs_lradc_regs *)MXS_LRADC_BASE;
mx28_src_power_init(); mxs_src_power_init();
batt_ready = mx28_is_batt_ready(); batt_ready = mxs_is_batt_ready();
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
batt_good = mx28_is_batt_good(); batt_good = mxs_is_batt_good();
if (batt_ready) { if (batt_ready) {
/* 5V source detected, good battery detected. */ /* 5V source detected, good battery detected. */
mx28_batt_boot(); mxs_batt_boot();
} else { } else {
if (batt_good) { if (batt_good) {
/* 5V source detected, low battery detceted. */ /* 5V source detected, low battery detceted. */
@ -674,21 +674,21 @@ void mx28_power_configure_power_source(void)
clrbits_le32(&power_regs->hw_power_battmonitor, clrbits_le32(&power_regs->hw_power_battmonitor,
POWER_BATTMONITOR_BATT_VAL_MASK); POWER_BATTMONITOR_BATT_VAL_MASK);
} }
mx28_5v_boot(); mxs_5v_boot();
} }
} else { } else {
/* 5V not detected, booting from battery. */ /* 5V not detected, booting from battery. */
mx28_batt_boot(); mxs_batt_boot();
} }
mx28_power_clock2pll(); mxs_power_clock2pll();
mx28_init_batt_bo(); mxs_init_batt_bo();
mx28_switch_vddd_to_dcdc_source(); mxs_switch_vddd_to_dcdc_source();
} }
void mx28_enable_output_rail_protection(void) void mxs_enable_output_rail_protection(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -706,7 +706,7 @@ void mx28_enable_output_rail_protection(void)
POWER_VDDIOCTRL_PWDN_BRNOUT); POWER_VDDIOCTRL_PWDN_BRNOUT);
} }
int mx28_get_vddio_power_source_off(void) int mxs_get_vddio_power_source_off(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -734,7 +734,7 @@ int mx28_get_vddio_power_source_off(void)
} }
int mx28_get_vddd_power_source_off(void) int mxs_get_vddd_power_source_off(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -765,7 +765,7 @@ int mx28_get_vddd_power_source_off(void)
return 0; return 0;
} }
void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout) void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -779,7 +779,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
cur_target *= 50; /* 50 mV step*/ cur_target *= 50; /* 50 mV step*/
cur_target += 2800; /* 2800 mV lowest */ cur_target += 2800; /* 2800 mV lowest */
powered_by_linreg = mx28_get_vddio_power_source_off(); powered_by_linreg = mxs_get_vddio_power_source_off();
if (new_target > cur_target) { if (new_target > cur_target) {
if (powered_by_linreg) { if (powered_by_linreg) {
@ -862,7 +862,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET); new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
} }
void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout) void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
@ -876,7 +876,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
cur_target *= 25; /* 25 mV step*/ cur_target *= 25; /* 25 mV step*/
cur_target += 800; /* 800 mV lowest */ cur_target += 800; /* 800 mV lowest */
powered_by_linreg = mx28_get_vddd_power_source_off(); powered_by_linreg = mxs_get_vddd_power_source_off();
if (new_target > cur_target) { if (new_target > cur_target) {
if (powered_by_linreg) { if (powered_by_linreg) {
bo_int = readl(&power_regs->hw_power_vdddctrl); bo_int = readl(&power_regs->hw_power_vdddctrl);
@ -959,31 +959,31 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET); new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
} }
void mx28_setup_batt_detect(void) void mxs_setup_batt_detect(void)
{ {
mx28_lradc_init(); mxs_lradc_init();
mx28_lradc_enable_batt_measurement(); mxs_lradc_enable_batt_measurement();
early_delay(10); early_delay(10);
} }
void mx28_power_init(void) void mxs_power_init(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
mx28_power_clock2xtal(); mxs_power_clock2xtal();
mx28_power_clear_auto_restart(); mxs_power_clear_auto_restart();
mx28_power_set_linreg(); mxs_power_set_linreg();
mx28_power_setup_5v_detect(); mxs_power_setup_5v_detect();
mx28_setup_batt_detect(); mxs_setup_batt_detect();
mx28_power_configure_power_source(); mxs_power_configure_power_source();
mx28_enable_output_rail_protection(); mxs_enable_output_rail_protection();
mx28_power_set_vddio(3300, 3150); mxs_power_set_vddio(3300, 3150);
mx28_power_set_vddd(1350, 1200); mxs_power_set_vddd(1350, 1200);
writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ | writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ | POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ |
@ -996,7 +996,7 @@ void mx28_power_init(void)
} }
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT #ifdef CONFIG_SPL_MX28_PSWITCH_WAIT
void mx28_power_wait_pswitch(void) void mxs_power_wait_pswitch(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;

4
arch/arm/include/asm/arch-mxs/sys_proto.h
View File

@ -35,7 +35,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#include <asm/arch/iomux-mx28.h> #include <asm/arch/iomux-mx28.h>
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size); const unsigned int iomux_size);
#endif #endif
@ -64,7 +64,7 @@ static const struct mx28_pair mx28_boot_modes[] = {
{ 0x00, 0x00, "Reserved/Unknown/Wrong" }, { 0x00, 0x00, "Reserved/Unknown/Wrong" },
}; };
struct mx28_spl_data { struct mxs_spl_data {
uint8_t boot_mode_idx; uint8_t boot_mode_idx;
uint32_t mem_dram_size; uint32_t mem_dram_size;
}; };

4
board/bluegiga/apx4devkit/spl_boot.c
View File

@ -145,13 +145,13 @@ const iomux_cfg_t iomux_setup[] = {
void board_init_ll(void) void board_init_ll(void)
{ {
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
/* switch LED on */ /* switch LED on */
gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0); gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
} }
void mx28_adjust_memory_params(uint32_t *dram_vals) void mxs_adjust_memory_params(uint32_t *dram_vals)
{ {
/* /*
* All address lines are routed from CPU to memory chip. * All address lines are routed from CPU to memory chip.

2
board/denx/m28evk/spl_boot.c
View File

@ -218,5 +218,5 @@ const iomux_cfg_t iomux_setup[] = {
void board_init_ll(void) void board_init_ll(void)
{ {
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
} }

2
board/freescale/mx28evk/iomux.c
View File

@ -180,5 +180,5 @@ void mx28_adjust_memory_params(uint32_t *dram_vals)
void board_init_ll(void) void board_init_ll(void)
{ {
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
} }