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Only set ddrioovcr for 8548 rev1.

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Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Andy Fleming 2007-02-23 16:28:46 -06:00 committed by Andrew Fleming-AFLEMING
parent 9343dbf85b
commit 1f9a318cea
1 changed files with 7 additions and 6 deletions
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13
cpu/mpc85xx/spd_sdram.c
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@ -263,13 +263,14 @@ spd_sdram(void)
} }
/* /*
* Adjust DDR II IO voltage biasing. It just makes it work. * Adjust DDR II IO voltage biasing.
* Only 8548 rev 1 needs the fix
*/ */
if (spd.mem_type == SPD_MEMTYPE_DDR2) { if ((SVR_VER(get_svr()) == SVR_8548_E) &&
gur->ddrioovcr = (0 (SVR_MJREV(get_svr()) == 1) &&
| 0x80000000 /* Enable */ (spd.mem_type == SPD_MEMTYPE_DDR2)) {
| 0x10000000 /* VSEL to 1.8V */ gur->ddrioovcr = (0x80000000 /* Enable */
); | 0x10000000);/* VSEL to 1.8V */
} }
/* /*