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Blackfin: bfin_sdh: set all timer bits before transfer

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The timer register is 32bits, not 16bit, so 0xFFFF won't fill it.
Write out -1 to make sure to fill the whole thing.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Cliff Cai 2009-12-07 06:12:11 +00:00 committed by Mike Frysinger
parent d633b2dbe4
commit 1fd2d792a2
1 changed files with 1 additions and 1 deletions
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2
drivers/mmc/bfin_sdh.c
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@ -123,7 +123,7 @@ static int sdh_setup_data(struct mmc *mmc, struct mmc_data *data)
bfin_write_SDH_DATA_CTL(data_ctl); bfin_write_SDH_DATA_CTL(data_ctl);
dma_cfg = WDSIZE_32 | RESTART | WNR | DMAEN; dma_cfg = WDSIZE_32 | RESTART | WNR | DMAEN;
bfin_write_SDH_DATA_TIMER(0xFFFF); bfin_write_SDH_DATA_TIMER(-1);
blackfin_dcache_flush_invalidate_range(data->dest, blackfin_dcache_flush_invalidate_range(data->dest,
data->dest + data->blocksize); data->dest + data->blocksize);