mirror of
https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git
synced 2025-09-12 21:46:05 -04:00
ARM: remove broken "gcplus" board.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: George G. Davis <gdavis@mvista.com>
This commit is contained in:
Wolfgang Denk
parent
26e670ea43
commit
2c650e2010
@ -624,10 +624,6 @@ Eric Cooper <ecc@cmu.edu>
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dockstar ARM926EJS (Kirkwood SoC)
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dockstar ARM926EJS (Kirkwood SoC)
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George G. Davis <gdavis@mvista.com>
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gcplus SA1100
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Wolfgang Denk <wd@denx.de>
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Wolfgang Denk <wd@denx.de>
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imx27lite i.MX27
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imx27lite i.MX27
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qong i.MX31
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qong i.MX31
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@ -1,53 +0,0 @@
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# 2003 (c) MontaVista Software, Inc.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := gcplus.o flash.o
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SOBJS := lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,13 +0,0 @@
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#
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# ADS GCPlus board with SA1110 cpu
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#
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# The ADS GCPlus has 2 banks of 16 MiB SDRAM
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#
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# We use the ADS GCPlus Linux boot ROM to load U-Boot into SDRAM
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# at c020'0000 and then move ourself to c8f0'0000. Basically, just
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# install the U-Boot binary as you would the Linux zImage and then
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# reap the benfits of more convenient Linux development cycles, i.e.
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# bootp;tftp;bootm, repeat, etc.,.
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#
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CONFIG_SYS_TEXT_BASE = 0xc8f00000
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@ -1,438 +0,0 @@
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/*
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* (C) Copyright 2001
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* 2003 (c) MontaVista Software, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <linux/byteorder/swab.h>
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/* Board support for 1 or 2 flash devices */
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#define FLASH_PORT_WIDTH32
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#undef FLASH_PORT_WIDTH16
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#ifdef FLASH_PORT_WIDTH16
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#define FLASH_PORT_WIDTH ushort
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#define FLASH_PORT_WIDTHV vu_short
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#define SWAP(x) __swab16(x)
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#else
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#define FLASH_PORT_WIDTH ulong
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#define FLASH_PORT_WIDTHV vu_long
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#define SWAP(x) __swab32(x)
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#endif
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#define FPW FLASH_PORT_WIDTH
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#define FPWV FLASH_PORT_WIDTHV
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#define mb() __asm__ __volatile__ ("" : : : "memory")
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size(FPW * addr, flash_info_t * info);
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static int write_data(flash_info_t * info, ulong dest, FPW data);
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static void flash_get_offsets(ulong base, flash_info_t * info);
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void inline spin_wheel(void);
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/*-----------------------------------------------------------------------
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*/
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unsigned long
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flash_init(void)
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{
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int i;
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ulong size = 0;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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switch (i) {
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case 0:
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flash_get_size((FPW *) PHYS_FLASH_1, &flash_info[i]);
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flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
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break;
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default:
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panic("configured too many flash banks!\n");
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break;
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}
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size += flash_info[i].size;
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}
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/* Protect monitor and environment sectors
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*/
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_SYS_FLASH_BASE,
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CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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static void
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flash_get_offsets(ulong base, flash_info_t * info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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return;
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}
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
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info->protect[i] = 0;
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}
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}
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}
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/*-----------------------------------------------------------------------
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*/
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void
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flash_print_info(flash_info_t * info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL:
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printf("INTEL ");
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break;
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default:
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printf("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F128J3A:
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printf("28F128J3A\n");
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break;
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case FLASH_28F640J5:
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printf("28F640J5\n");
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break;
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default:
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printf("Unknown Chip Type\n");
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break;
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}
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printf(" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf(" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf("\n ");
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printf(" %08lX%s",
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info->start[i], info->protect[i] ? " (RO)" : " ");
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}
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printf("\n");
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return;
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}
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong
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flash_get_size(FPW * addr, flash_info_t * info)
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{
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volatile FPW value;
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/* Write auto select command: read Manufacturer ID */
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addr[0x5555] = (FPW) 0x00AA00AA;
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addr[0x2AAA] = (FPW) 0x00550055;
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addr[0x5555] = (FPW) 0x00900090;
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mb();
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value = addr[0];
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switch (value) {
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case (FPW) INTEL_MANUFACT:
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
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return (0); /* no or unknown flash */
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}
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mb();
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value = addr[1]; /* device ID */
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switch (value) {
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case (FPW) INTEL_ID_28F128J3A:
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info->flash_id += FLASH_28F128J3A;
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info->sector_count = 128;
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info->size = 0x02000000;
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break; /* => 16 MB */
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case (FPW) INTEL_ID_28F640J5:
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info->flash_id += FLASH_28F640J5;
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info->sector_count = 64;
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info->size = 0x01000000;
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break; /* => 16 MB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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break;
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}
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if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
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printf("** ERROR: sector count %d > max (%d) **\n",
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info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
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info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
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}
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addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
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return (info->size);
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}
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/*-----------------------------------------------------------------------
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*/
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int
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flash_erase(flash_info_t * info, int s_first, int s_last)
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{
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int flag, prot, sect;
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ulong type, start;
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int rcode = 0;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf("- missing\n");
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} else {
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printf("- no sectors to erase\n");
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}
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return 1;
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}
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type = (info->flash_id & FLASH_VENDMASK);
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if ((type != FLASH_MAN_INTEL)) {
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printf("Can't erase unknown flash type %08lx - aborted\n",
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info->flash_id);
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return 1;
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}
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||||||
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||||||
prot = 0;
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||||||
for (sect = s_first; sect <= s_last; ++sect) {
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|
||||||
if (info->protect[sect]) {
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|
||||||
prot++;
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|
||||||
}
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|
||||||
}
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|
||||||
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||||||
if (prot) {
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|
||||||
printf("- Warning: %d protected sectors will not be erased!\n",
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||||||
prot);
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|
||||||
} else {
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|
||||||
printf("\n");
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|
||||||
}
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|
||||||
|
|
||||||
/* Disable interrupts which might cause a timeout here */
|
|
||||||
flag = disable_interrupts();
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|
||||||
|
|
||||||
/* Start erase on unprotected sectors */
|
|
||||||
for (sect = s_first; sect <= s_last; sect++) {
|
|
||||||
if (info->protect[sect] == 0) { /* not protected */
|
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||||||
FPWV *addr = (FPWV *) (info->start[sect]);
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|
||||||
FPW status;
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|
||||||
|
|
||||||
printf("Erasing sector %2d ... ", sect);
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|
||||||
|
|
||||||
/* arm simple, non interrupt dependent timer */
|
|
||||||
start = get_timer(0);
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|
||||||
|
|
||||||
*addr = (FPW) 0x00500050; /* clear status register */
|
|
||||||
*addr = (FPW) 0x00200020; /* erase setup */
|
|
||||||
*addr = (FPW) 0x00D000D0; /* erase confirm */
|
|
||||||
|
|
||||||
while (((status =
|
|
||||||
*addr) & (FPW) 0x00800080) !=
|
|
||||||
(FPW) 0x00800080) {
|
|
||||||
if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
|
|
||||||
printf("Timeout\n");
|
|
||||||
*addr = (FPW) 0x00B000B0; /* suspend erase */
|
|
||||||
*addr = (FPW) 0x00FF00FF; /* reset to read mode */
|
|
||||||
rcode = 1;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
*addr = (FPW) 0x00500050; /* clear status register cmd. */
|
|
||||||
*addr = (FPW) 0x00FF00FF; /* resest to read mode */
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|
||||||
|
|
||||||
printf(" done\n");
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|
||||||
}
|
|
||||||
}
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|
||||||
return rcode;
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|
||||||
}
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|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Copy memory to flash, returns:
|
|
||||||
* 0 - OK
|
|
||||||
* 1 - write timeout
|
|
||||||
* 2 - Flash not erased
|
|
||||||
* 4 - Flash not identified
|
|
||||||
*/
|
|
||||||
|
|
||||||
int
|
|
||||||
write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
|
|
||||||
{
|
|
||||||
ulong cp, wp;
|
|
||||||
FPW data;
|
|
||||||
int count, i, l, rc, port_width;
|
|
||||||
|
|
||||||
if (info->flash_id == FLASH_UNKNOWN) {
|
|
||||||
return 4;
|
|
||||||
}
|
|
||||||
/* get lower word aligned address */
|
|
||||||
#ifdef FLASH_PORT_WIDTH16
|
|
||||||
wp = (addr & ~1);
|
|
||||||
port_width = 2;
|
|
||||||
#else
|
|
||||||
wp = (addr & ~3);
|
|
||||||
port_width = 4;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle unaligned start bytes
|
|
||||||
*/
|
|
||||||
if ((l = addr - wp) != 0) {
|
|
||||||
data = 0;
|
|
||||||
for (i = 0, cp = wp; i < l; ++i, ++cp) {
|
|
||||||
data = (data << 8) | (*(uchar *) cp);
|
|
||||||
}
|
|
||||||
for (; i < port_width && cnt > 0; ++i) {
|
|
||||||
data = (data << 8) | *src++;
|
|
||||||
--cnt;
|
|
||||||
++cp;
|
|
||||||
}
|
|
||||||
for (; cnt == 0 && i < port_width; ++i, ++cp) {
|
|
||||||
data = (data << 8) | (*(uchar *) cp);
|
|
||||||
}
|
|
||||||
|
|
||||||
if ((rc = write_data(info, wp, SWAP(data))) != 0) {
|
|
||||||
return (rc);
|
|
||||||
}
|
|
||||||
wp += port_width;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle word aligned part
|
|
||||||
*/
|
|
||||||
count = 0;
|
|
||||||
while (cnt >= port_width) {
|
|
||||||
data = 0;
|
|
||||||
for (i = 0; i < port_width; ++i) {
|
|
||||||
data = (data << 8) | *src++;
|
|
||||||
}
|
|
||||||
if ((rc = write_data(info, wp, SWAP(data))) != 0) {
|
|
||||||
return (rc);
|
|
||||||
}
|
|
||||||
wp += port_width;
|
|
||||||
cnt -= port_width;
|
|
||||||
if (count++ > 0x800) {
|
|
||||||
spin_wheel();
|
|
||||||
count = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (cnt == 0) {
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle unaligned tail bytes
|
|
||||||
*/
|
|
||||||
data = 0;
|
|
||||||
for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
|
|
||||||
data = (data << 8) | *src++;
|
|
||||||
--cnt;
|
|
||||||
}
|
|
||||||
for (; i < port_width; ++i, ++cp) {
|
|
||||||
data = (data << 8) | (*(uchar *) cp);
|
|
||||||
}
|
|
||||||
|
|
||||||
return (write_data(info, wp, SWAP(data)));
|
|
||||||
}
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Write a word or halfword to Flash, returns:
|
|
||||||
* 0 - OK
|
|
||||||
* 1 - write timeout
|
|
||||||
* 2 - Flash not erased
|
|
||||||
*/
|
|
||||||
static int
|
|
||||||
write_data(flash_info_t * info, ulong dest, FPW data)
|
|
||||||
{
|
|
||||||
FPWV *addr = (FPWV *) dest;
|
|
||||||
ulong status;
|
|
||||||
int flag;
|
|
||||||
ulong start;
|
|
||||||
|
|
||||||
/* Check if Flash is (sufficiently) erased */
|
|
||||||
if ((*addr & data) != data) {
|
|
||||||
printf("not erased at %08lX (%lX)\n", (ulong) addr, *addr);
|
|
||||||
return (2);
|
|
||||||
}
|
|
||||||
/* Disable interrupts which might cause a timeout here */
|
|
||||||
flag = disable_interrupts();
|
|
||||||
|
|
||||||
*addr = (FPW) 0x00400040; /* write setup */
|
|
||||||
*addr = data;
|
|
||||||
|
|
||||||
/* arm simple, non interrupt dependent timer */
|
|
||||||
start = get_timer(0);
|
|
||||||
|
|
||||||
/* wait while polling the status register */
|
|
||||||
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
|
|
||||||
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
|
|
||||||
*addr = (FPW) 0x00FF00FF; /* restore read mode */
|
|
||||||
return (1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
*addr = (FPW) 0x00FF00FF; /* restore read mode */
|
|
||||||
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
||||||
void inline
|
|
||||||
spin_wheel(void)
|
|
||||||
{
|
|
||||||
static int p = 0;
|
|
||||||
static char w[] = "\\/-";
|
|
||||||
|
|
||||||
printf("\010%c", w[p]);
|
|
||||||
(++p == 3) ? (p = 0) : 0;
|
|
||||||
}
|
|
||||||
@ -1,82 +0,0 @@
|
|||||||
/*
|
|
||||||
* (C) Copyright 2002
|
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
|
||||||
* Marius Groeger <mgroeger@sysgo.de>
|
|
||||||
*
|
|
||||||
* 2003-2004 (c) MontaVista Software, Inc.
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
#include <netdev.h>
|
|
||||||
#include <SA-1100.h>
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscelaneous platform dependent initialisations
|
|
||||||
*/
|
|
||||||
|
|
||||||
int
|
|
||||||
board_init(void)
|
|
||||||
{
|
|
||||||
gd->bd->bi_arch_number = MACH_TYPE_GRAPHICSCLIENT;
|
|
||||||
|
|
||||||
gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */
|
|
||||||
|
|
||||||
/* Most of the ADS GCPlus I/O is connected to Static nCS2.
|
|
||||||
* So I'm brute forcing nCS2 timiming here for worst case.
|
|
||||||
*/
|
|
||||||
MSC1 &= ~0xFFFF;
|
|
||||||
MSC1 |= 0x8649;
|
|
||||||
|
|
||||||
/* Nothing is connected to Static nCS4 or nCS5. But I'm using
|
|
||||||
* nCS4 as a paranoia safe guard to force nCS2, nOE; nWE high
|
|
||||||
* after accessing I/O via (non-VLIO) nCS2. What can I say, I'm
|
|
||||||
* paranoid and lack decent tools to alleviate my fear. I sure
|
|
||||||
* do wish I had a logic analyzer. : (
|
|
||||||
*/
|
|
||||||
|
|
||||||
MSC2 = 0xfff9fff9;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int
|
|
||||||
dram_init(void)
|
|
||||||
{
|
|
||||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
|
||||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
|
||||||
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
|
|
||||||
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
|
|
||||||
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_CMD_NET
|
|
||||||
int board_eth_init(bd_t *bis)
|
|
||||||
{
|
|
||||||
int rc = 0;
|
|
||||||
#ifdef CONFIG_LAN91C96
|
|
||||||
rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
|
|
||||||
#endif
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
@ -1,77 +0,0 @@
|
|||||||
/*
|
|
||||||
* Memory Setup stuff - taken from blob memsetup.S
|
|
||||||
*
|
|
||||||
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
|
|
||||||
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
|
|
||||||
* 2003-2004 (c) MontaVista Software, Inc.
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "config.h"
|
|
||||||
#include "version.h"
|
|
||||||
|
|
||||||
|
|
||||||
.globl lowlevel_init
|
|
||||||
lowlevel_init:
|
|
||||||
/* The ADS GC+ for Linux Boot Rom Ver. 1.73 does memory init for us.
|
|
||||||
* However the darn thing leaves the MMU enabled before handing control
|
|
||||||
* over to us. So we need to disable the MMU and we use lowlevel_init
|
|
||||||
* to do it.
|
|
||||||
*/
|
|
||||||
|
|
||||||
@ The following code segment was borrowed with gratitude from:
|
|
||||||
@ linux-2.4.19-rmk7/arch/arm/boot/compressed/head-sa1100.S
|
|
||||||
|
|
||||||
@ Data cache might be active.
|
|
||||||
@ Be sure to flush kernel binary out of the cache,
|
|
||||||
@ whatever state it is, before it is turned off.
|
|
||||||
@ This is done by fetching through currently executed
|
|
||||||
@ memory to be sure we hit the same cache.
|
|
||||||
bic r2, pc, #0x1f
|
|
||||||
add r3, r2, #0x4000 @ 16 kb is quite enough...
|
|
||||||
1: ldr r0, [r2], #32
|
|
||||||
teq r2, r3
|
|
||||||
bne 1b
|
|
||||||
mcr p15, 0, r0, c7, c10, 4 @ drain WB
|
|
||||||
mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
|
|
||||||
|
|
||||||
@ disabling MMU and caches
|
|
||||||
mrc p15, 0, r0, c1, c0, 0 @ read control reg
|
|
||||||
bic r0, r0, #0x0d @ clear WB, DC, MMU
|
|
||||||
bic r0, r0, #0x1000 @ clear Icache
|
|
||||||
mcr p15, 0, r0, c1, c0, 0
|
|
||||||
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
|
|
||||||
b 2f
|
|
||||||
2:
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
|
|
||||||
|
|
||||||
mov pc, lr
|
|
||||||
@ -219,7 +219,6 @@ xaeniax arm pxa
|
|||||||
xm250 arm pxa
|
xm250 arm pxa
|
||||||
zipitz2 arm pxa
|
zipitz2 arm pxa
|
||||||
zylonite arm pxa
|
zylonite arm pxa
|
||||||
gcplus arm sa1100
|
|
||||||
jornada arm sa1100
|
jornada arm sa1100
|
||||||
lart arm sa1100
|
lart arm sa1100
|
||||||
shannon arm sa1100
|
shannon arm sa1100
|
||||||
|
|||||||
@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
|
|||||||
|
|
||||||
Board Arch CPU removed Commit last known maintainer/contact
|
Board Arch CPU removed Commit last known maintainer/contact
|
||||||
=============================================================================
|
=============================================================================
|
||||||
|
gcplus arm sa1100 - 2011-09-05 George G. Davis <gdavis@mvista.com>
|
||||||
evb4510 arm arm720t - 2011-09-05 Curt Brune <curt@cucy.com>
|
evb4510 arm arm720t - 2011-09-05 Curt Brune <curt@cucy.com>
|
||||||
ep7312 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de>
|
ep7312 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de>
|
||||||
dnp1110 arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de>
|
dnp1110 arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de>
|
||||||
|
|||||||
@ -1,185 +0,0 @@
|
|||||||
/*
|
|
||||||
* (C) Copyright 2002
|
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
|
||||||
* Marius Groeger <mgroeger@sysgo.de>
|
|
||||||
*
|
|
||||||
* 2003-2004 (c) MontaVista Software, Inc.
|
|
||||||
*
|
|
||||||
* Configuation settings for the ADS GraphicsClient+ board.
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __CONFIG_H
|
|
||||||
#define __CONFIG_H
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000.
|
|
||||||
* We don't actually init RAM in this case since we're using U-Boot as
|
|
||||||
* an secondary boot loader during Linux kernel development and testing,
|
|
||||||
* e.g. bootp/tftp download of the kernel is a far more convenient
|
|
||||||
* when testing new kernels on this target. However the ADS GCPlus Linux
|
|
||||||
* boot ROM leaves the MMU enabled when it passes control to U-Boot. So
|
|
||||||
* we use lowlevel_init (!CONFIG_SKIP_LOWLEVEL_INIT) to remedy that problem.
|
|
||||||
*/
|
|
||||||
#undef CONFIG_SKIP_LOWLEVEL_INIT
|
|
||||||
|
|
||||||
/*
|
|
||||||
* High Level Configuration Options
|
|
||||||
* (easy to change)
|
|
||||||
*/
|
|
||||||
#define CONFIG_SA1110 1 /* This is an SA1100 CPU */
|
|
||||||
#define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */
|
|
||||||
|
|
||||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
|
||||||
/* we will never enable dcache, because we have to setup MMU first */
|
|
||||||
#define CONFIG_SYS_DCACHE_OFF
|
|
||||||
|
|
||||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
|
||||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
|
||||||
#define CONFIG_INITRD_TAG 1
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Size of malloc() pool
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Hardware drivers
|
|
||||||
*/
|
|
||||||
#define CONFIG_NET_MULTI
|
|
||||||
#define CONFIG_LAN91C96 /* we have an SMC9194 on-board */
|
|
||||||
#define CONFIG_LAN91C96_BASE 0x100e0000
|
|
||||||
|
|
||||||
/*
|
|
||||||
* select serial console configuration
|
|
||||||
*/
|
|
||||||
#define CONFIG_SA1100_SERIAL
|
|
||||||
#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */
|
|
||||||
|
|
||||||
/* allow to overwrite serial and ethaddr */
|
|
||||||
#define CONFIG_ENV_OVERWRITE
|
|
||||||
|
|
||||||
#define CONFIG_BAUDRATE 38400
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Command line configuration.
|
|
||||||
*/
|
|
||||||
#include <config_cmd_default.h>
|
|
||||||
|
|
||||||
#define CONFIG_CMD_DHCP
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* BOOTP options
|
|
||||||
*/
|
|
||||||
#define CONFIG_BOOTP_SUBNETMASK
|
|
||||||
#define CONFIG_BOOTP_GATEWAY
|
|
||||||
#define CONFIG_BOOTP_HOSTNAME
|
|
||||||
#define CONFIG_BOOTP_BOOTPATH
|
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_BOOTDELAY 3
|
|
||||||
#define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp"
|
|
||||||
#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
|
|
||||||
#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
|
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_KGDB)
|
|
||||||
#define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */
|
|
||||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscellaneous configurable options
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
|
||||||
#define CONFIG_SYS_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */
|
|
||||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
|
||||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
|
||||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
|
||||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
|
|
||||||
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
|
|
||||||
#define CONFIG_SYS_CPUSPEED 0x0a /* set core clock to 206MHz */
|
|
||||||
|
|
||||||
/* valid baudrates */
|
|
||||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Stack sizes
|
|
||||||
*
|
|
||||||
* The stack sizes are set up in start.S using the settings below
|
|
||||||
*/
|
|
||||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
|
|
||||||
#ifdef CONFIG_USE_IRQ
|
|
||||||
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
|
|
||||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Physical Memory Map
|
|
||||||
*/
|
|
||||||
#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
|
|
||||||
#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
|
|
||||||
#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
|
|
||||||
#define PHYS_SDRAM_2 0xc8000000 /* SDRAM Bank #2 */
|
|
||||||
#define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
|
|
||||||
|
|
||||||
|
|
||||||
#define PHYS_FLASH_1 0x08000000 /* Flash Bank #1 */
|
|
||||||
#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
|
|
||||||
#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
|
|
||||||
#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* FLASH and environment organization
|
|
||||||
*/
|
|
||||||
#if 1
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
|
|
||||||
|
|
||||||
/* timeout values are in ticks */
|
|
||||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
|
||||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
|
||||||
#else
|
|
||||||
/* REVISIT: This doesn't work on ADS GCPlus just yet: */
|
|
||||||
#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */
|
|
||||||
#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
|
|
||||||
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
|
|
||||||
#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */
|
|
||||||
/*#define CONFIG_SYS_FLASH_PROTECTION 1 /--* hardware flash protection */
|
|
||||||
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
||||||
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */
|
|
||||||
#define CONFIG_ENV_SIZE PHYS_FLASH_SECT_SIZE
|
|
||||||
|
|
||||||
#endif /* __CONFIG_H */
|
|
||||||
Loading…
x
Reference in New Issue
Block a user