mirror of
https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git
synced 2025-09-10 12:39:22 -04:00
[ColdFire MCF5271 family] Add CPU detection based on the value of Chip
Identification Register (CIR).
This commit is contained in:
parent
c84bad0ef6
commit
363d1d8f9c
@ -49,11 +49,43 @@
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_M5271
|
#ifdef CONFIG_M5271
|
||||||
|
/*
|
||||||
|
* Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
|
||||||
|
* determine which one we are running on, based on the Chip Identification
|
||||||
|
* Register (CIR).
|
||||||
|
*/
|
||||||
int checkcpu (void)
|
int checkcpu (void)
|
||||||
{
|
{
|
||||||
char buf[32];
|
char buf[32];
|
||||||
|
unsigned short cir; /* Chip Identification Register */
|
||||||
|
unsigned short pin; /* Part identification number */
|
||||||
|
unsigned char prn; /* Part revision number */
|
||||||
|
char *cpu_model;
|
||||||
|
|
||||||
|
cir = mbar_readShort(MCF_CCM_CIR);
|
||||||
|
pin = cir >> MCF_CCM_CIR_PIN_LEN;
|
||||||
|
prn = cir & MCF_CCM_CIR_PRN_MASK;
|
||||||
|
|
||||||
|
switch (pin) {
|
||||||
|
case MCF_CCM_CIR_PIN_MCF5270:
|
||||||
|
cpu_model = "5270";
|
||||||
|
break;
|
||||||
|
case MCF_CCM_CIR_PIN_MCF5271:
|
||||||
|
cpu_model = "5271";
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
cpu_model = NULL;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (cpu_model)
|
||||||
|
printf("CPU: Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
|
||||||
|
cpu_model, prn, strmhz(buf, CFG_CLK));
|
||||||
|
else
|
||||||
|
printf("CPU: Unknown - Freescale ColdFire MCF5271 family"
|
||||||
|
" (PIN: 0x%x) rev. %hu, at %s MHz\n",
|
||||||
|
pin, prn, strmhz(buf, CFG_CLK));
|
||||||
|
|
||||||
printf ("CPU: Freescale Coldfire MCF5271 at %s MHz\n", strmhz(buf, CFG_CLK));
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -57,6 +57,12 @@
|
|||||||
#define MCF_GPIO_PAR_FECI2C 0x100047
|
#define MCF_GPIO_PAR_FECI2C 0x100047
|
||||||
#define MCF_GPIO_PAR_UART 0x100048
|
#define MCF_GPIO_PAR_UART 0x100048
|
||||||
|
|
||||||
|
#define MCF_CCM_CIR 0x11000A
|
||||||
|
#define MCF_CCM_CIR_PRN_MASK 0x3F
|
||||||
|
#define MCF_CCM_CIR_PIN_LEN 6
|
||||||
|
#define MCF_CCM_CIR_PIN_MCF5270 0x2e
|
||||||
|
#define MCF_CCM_CIR_PIN_MCF5271 0x80
|
||||||
|
|
||||||
#define MCF_GPIO_AD_ADDR23 0x80
|
#define MCF_GPIO_AD_ADDR23 0x80
|
||||||
#define MCF_GPIO_AD_ADDR22 0x40
|
#define MCF_GPIO_AD_ADDR22 0x40
|
||||||
#define MCF_GPIO_AD_ADDR21 0x20
|
#define MCF_GPIO_AD_ADDR21 0x20
|
||||||
|
Loading…
x
Reference in New Issue
Block a user