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dm: mips: Fix lb60 WDT control

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Write the TSCR register via 32bit write instead of 16bit one.
The register is 32bit wide and bit 16 is being set, triggering
gcc overflow error and making the code broken.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
This commit is contained in:
Marek Vasut 2012-08-12 16:53:35 +02:00 committed by Daniel Schwierzeck
parent e66443fdb5
commit 36d0a42b68
1 changed files with 1 additions and 1 deletions
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2
arch/mips/cpu/xburst/cpu.c
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@ -62,7 +62,7 @@ void __attribute__((weak)) _machine_restart(void)
writew(100, &wdt->tdr); /* wdt_set_data(100) */
writew(0, &wdt->tcnt); /* wdt_set_count(0); */
writew(TCU_TSSR_WDTSC, &tcu->tscr); /* tcu_start_wdt_clock */
writel(TCU_TSSR_WDTSC, &tcu->tscr); /* tcu_start_wdt_clock */
writeb(readb(&wdt->tcer) | WDT_TCER_TCEN, &wdt->tcer); /* wdt start */
while (1)