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ARM: */start.S: code cleanup

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Remove the useless code from start.S

Signed-off-by: Jason Liu <r64343@freescale.com>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
This commit is contained in:
Liu Hui-R64343 2010-12-22 18:35:04 +00:00 committed by Albert Aribaud
parent 3c0659b535
commit 386ad72637
14 changed files with 0 additions and 28 deletions
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2
arch/arm/cpu/arm1136/start.S
View File

@ -196,7 +196,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -251,7 +250,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/arm1176/start.S
View File

@ -250,7 +250,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -343,7 +342,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/arm720t/start.S
View File

@ -165,7 +165,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -220,7 +219,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/arm920t/start.S
View File

@ -211,7 +211,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -266,7 +265,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/arm925t/start.S
View File

@ -202,7 +202,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -257,7 +256,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/arm926ejs/start.S
View File

@ -201,7 +201,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy loop */ mov r1, r6 /* r1 <- scratch for copy loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -256,7 +255,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/arm946es/start.S
View File

@ -173,7 +173,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -228,7 +227,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/arm_intcm/start.S
View File

@ -169,7 +169,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -224,7 +223,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/armv7/start.S
View File

@ -171,7 +171,6 @@ stack_setup:
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
#endif #endif
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -224,7 +223,6 @@ fixnext:
clear_bss: clear_bss:
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/ixp/start.S
View File

@ -295,7 +295,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -350,7 +349,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/lh7a40x/start.S
View File

@ -182,7 +182,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -237,7 +236,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/pxa/start.S
View File

@ -247,7 +247,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -304,7 +303,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/s3c44b0/start.S
View File

@ -154,7 +154,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -209,7 +208,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4

2
arch/arm/cpu/sa1100/start.S
View File

@ -158,7 +158,6 @@ stack_setup:
cmp r0, r6 cmp r0, r6
beq clear_bss /* skip relocation */ beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */ add r2, r0, r3 /* r2 <- source end address */
@ -213,7 +212,6 @@ clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r6 /* reloc addr */ mov r4, r6 /* reloc addr */
add r0, r0, r4 add r0, r0, r4
add r1, r1, r4 add r1, r1, r4