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exynos5: Add DT based driver for SMC911X ethernet
Add device tree based ethernet driver for SMC911X controller on SMDK5250 boards. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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@ -48,4 +48,22 @@ struct s5p_sromc {
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/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
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/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
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void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
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void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
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enum {
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FDT_SROM_PMC,
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FDT_SROM_TACP,
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FDT_SROM_TAH,
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FDT_SROM_TCOH,
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FDT_SROM_TACC,
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FDT_SROM_TCOS,
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FDT_SROM_TACS,
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FDT_SROM_TIMING_COUNT,
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};
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struct fdt_sromc {
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u8 bank; /* srom bank number */
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u8 width; /* bus width in bytes */
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unsigned int timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
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};
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#endif /* __ASM_ARCH_SROMC_H_ */
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#endif /* __ASM_ARCH_SROMC_H_ */
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@ -21,6 +21,7 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <fdtdec.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <i2c.h>
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#include <i2c.h>
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#include <netdev.h>
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#include <netdev.h>
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@ -34,34 +35,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_SMC911X
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static int smc9115_pre_init(void)
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{
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u32 smc_bw_conf, smc_bc_conf;
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int err;
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/* Ethernet needs data bus width of 16 bits */
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smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK)
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| SROMC_BYTE_ENABLE(CONFIG_ENV_SROM_BANK);
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smc_bc_conf = SROMC_BC_TACS(0x01) | SROMC_BC_TCOS(0x01)
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| SROMC_BC_TACC(0x06) | SROMC_BC_TCOH(0x01)
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| SROMC_BC_TAH(0x0C) | SROMC_BC_TACP(0x09)
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| SROMC_BC_PMC(0x01);
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/* Select and configure the SROMC bank */
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err = exynos_pinmux_config(PERIPH_ID_SROMC,
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CONFIG_ENV_SROM_BANK | PINMUX_FLAG_16BIT);
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if (err) {
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debug("SROMC not configured\n");
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return err;
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}
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s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
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return 0;
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}
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#endif
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int board_init(void)
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int board_init(void)
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{
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{
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gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
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gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
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@ -122,12 +95,94 @@ void dram_init_banksize(void)
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PHYS_SDRAM_8_SIZE);
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PHYS_SDRAM_8_SIZE);
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}
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}
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#ifdef CONFIG_OF_CONTROL
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static int decode_sromc(const void *blob, struct fdt_sromc *config)
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{
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int err;
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int node;
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node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
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if (node < 0) {
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debug("Could not find SROMC node\n");
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return node;
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}
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config->bank = fdtdec_get_int(blob, node, "bank", 0);
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config->width = fdtdec_get_int(blob, node, "width", 2);
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err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
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FDT_SROM_TIMING_COUNT);
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if (err < 0) {
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debug("Could not decode SROMC configuration\n");
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return -FDT_ERR_NOTFOUND;
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}
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return 0;
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}
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#endif
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int board_eth_init(bd_t *bis)
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int board_eth_init(bd_t *bis)
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{
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{
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#ifdef CONFIG_SMC911X
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#ifdef CONFIG_SMC911X
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if (smc9115_pre_init())
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u32 smc_bw_conf, smc_bc_conf;
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struct fdt_sromc config;
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fdt_addr_t base_addr;
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int node;
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#ifdef CONFIG_OF_CONTROL
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node = decode_sromc(gd->fdt_blob, &config);
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if (node < 0) {
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debug("%s: Could not find sromc configuration\n", __func__);
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return 0;
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}
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node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
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if (node < 0) {
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debug("%s: Could not find lan9215 configuration\n", __func__);
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return 0;
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}
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/* We now have a node, so any problems from now on are errors */
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base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
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if (base_addr == FDT_ADDR_T_NONE) {
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debug("%s: Could not find lan9215 address\n", __func__);
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return -1;
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return -1;
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return smc911x_initialize(0, CONFIG_SMC911X_BASE);
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}
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#else
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/* Non-FDT configuration - bank number and timing parameters*/
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config.bank = CONFIG_ENV_SROM_BANK;
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config.width = 2;
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config.timing[FDT_SROM_TACS] = 0x01;
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config.timing[FDT_SROM_TCOS] = 0x01;
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config.timing[FDT_SROM_TACC] = 0x06;
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config.timing[FDT_SROM_TCOH] = 0x01;
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config.timing[FDT_SROM_TAH] = 0x0C;
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config.timing[FDT_SROM_TACP] = 0x09;
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config.timing[FDT_SROM_PMC] = 0x01;
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base_addr = CONFIG_SMC911X_BASE;
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#endif
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/* Ethernet needs data bus width of 16 bits */
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if (config.width != 2) {
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debug("%s: Unsupported bus width %d\n", __func__,
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config.width);
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return -1;
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}
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smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
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| SROMC_BYTE_ENABLE(config.bank);
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smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |\
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SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |\
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SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |\
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SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |\
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SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |\
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SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |\
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SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
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/* Select and configure the SROMC bank */
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exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
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s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
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return smc911x_initialize(0, base_addr);
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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