Merge branch 'mpc86xx'

This commit is contained in:
Jon Loeliger 2006-08-23 11:04:54 -05:00
commit 41ec8b1803

View File

@ -44,6 +44,7 @@ hd_driveid_t *ataid[AHCI_MAX_PORTS];
#define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0) #define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
static inline u32 ahci_port_base(u32 base, u32 port) static inline u32 ahci_port_base(u32 base, u32 port)
{ {
return base + 0x100 + (port * 0x80); return base + 0x100 + (port * 0x80);
@ -62,10 +63,14 @@ static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
#define msleep(a) udelay(a * 1000) #define msleep(a) udelay(a * 1000)
#define ssleep(a) msleep(a * 1000) #define ssleep(a) msleep(a * 1000)
static int waiting_for_cmd_completed(volatile u8 *offset, int timeout_msec, u32 sign)
static int waiting_for_cmd_completed(volatile u8 *offset,
int timeout_msec,
u32 sign)
{ {
int i; int i;
u32 status; u32 status;
for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++) for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
msleep(1); msleep(1);
@ -126,8 +131,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
for (i = 0; i < probe_ent->n_ports; i++) { for (i = 0; i < probe_ent->n_ports; i++) {
probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i); probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
port_mmio = (u8 *) probe_ent->port[i].port_mmio; port_mmio = (u8 *) probe_ent->port[i].port_mmio;
ahci_setup_port(&probe_ent->port[i], ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
(unsigned long) mmio, i);
/* make sure port is not active */ /* make sure port is not active */
tmp = readl(port_mmio + PORT_CMD); tmp = readl(port_mmio + PORT_CMD);
@ -222,43 +226,31 @@ static void ahci_print_info(struct ahci_probe_ent *probe_ent)
scc_s = "unknown"; scc_s = "unknown";
printf("AHCI %02x%02x.%02x%02x " printf("AHCI %02x%02x.%02x%02x "
"%u slots %u ports %s Gbps 0x%x impl %s mode\n" "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
,
(vers >> 24) & 0xff, (vers >> 24) & 0xff,
(vers >> 16) & 0xff, (vers >> 16) & 0xff,
(vers >> 8) & 0xff, (vers >> 8) & 0xff,
vers & 0xff, vers & 0xff,
((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
((cap >> 8) & 0x1f) + 1,
(cap & 0x1f) + 1,
speed_s,
impl,
scc_s);
printf("flags: " printf("flags: "
"%s%s%s%s%s%s" "%s%s%s%s%s%s"
"%s%s%s%s%s%s%s\n" "%s%s%s%s%s%s%s\n",
,
cap & (1 << 31) ? "64bit " : "", cap & (1 << 31) ? "64bit " : "",
cap & (1 << 30) ? "ncq " : "", cap & (1 << 30) ? "ncq " : "",
cap & (1 << 28) ? "ilck " : "", cap & (1 << 28) ? "ilck " : "",
cap & (1 << 27) ? "stag " : "", cap & (1 << 27) ? "stag " : "",
cap & (1 << 26) ? "pm " : "", cap & (1 << 26) ? "pm " : "",
cap & (1 << 25) ? "led " : "", cap & (1 << 25) ? "led " : "",
cap & (1 << 24) ? "clo " : "", cap & (1 << 24) ? "clo " : "",
cap & (1 << 19) ? "nz " : "", cap & (1 << 19) ? "nz " : "",
cap & (1 << 18) ? "only " : "", cap & (1 << 18) ? "only " : "",
cap & (1 << 17) ? "pmp " : "", cap & (1 << 17) ? "pmp " : "",
cap & (1 << 15) ? "pio " : "", cap & (1 << 15) ? "pio " : "",
cap & (1 << 14) ? "slum " : "", cap & (1 << 14) ? "slum " : "",
cap & (1 << 13) ? "part " : "" cap & (1 << 13) ? "part " : "");
);
} }
static int ahci_init_one(pci_dev_t pdev) static int ahci_init_one(pci_dev_t pdev)
{ {
u32 iobase, vendor; u32 iobase, vendor;
@ -273,8 +265,10 @@ static int ahci_init_one (pci_dev_t pdev)
pci_read_config_dword(pdev, AHCI_PCI_BAR, &iobase); pci_read_config_dword(pdev, AHCI_PCI_BAR, &iobase);
iobase &= ~0xf; iobase &= ~0xf;
probe_ent->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY probe_ent->host_flags = ATA_FLAG_SATA
| ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_LEGACY
| ATA_FLAG_MMIO
| ATA_FLAG_PIO_DMA
| ATA_FLAG_NO_ATAPI; | ATA_FLAG_NO_ATAPI;
probe_ent->pio_mask = 0x1f; probe_ent->pio_mask = 0x1f;
probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */ probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
@ -304,9 +298,9 @@ err_out:
#define MAX_DATA_BYTE_COUNT (4*1024*1024) #define MAX_DATA_BYTE_COUNT (4*1024*1024)
static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len) static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
{ {
struct ahci_ioports *pp = &(probe_ent->port[port]); struct ahci_ioports *pp = &(probe_ent->port[port]);
struct ahci_sg *ahci_sg = pp->cmd_tbl_sg; struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
u32 sg_count; u32 sg_count;
@ -318,9 +312,9 @@ static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
return -1; return -1;
} }
for(i = 0;i < sg_count; i++) for (i = 0; i < sg_count; i++) {
{ ahci_sg->addr =
ahci_sg->addr = cpu_to_le32((u32)buf + i * MAX_DATA_BYTE_COUNT); cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
ahci_sg->addr_hi = 0; ahci_sg->addr_hi = 0;
ahci_sg->flags_size = cpu_to_le32(0x3fffff & ahci_sg->flags_size = cpu_to_le32(0x3fffff &
(buf_len < MAX_DATA_BYTE_COUNT (buf_len < MAX_DATA_BYTE_COUNT
@ -345,7 +339,6 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
static void ahci_set_feature(u8 port) static void ahci_set_feature(u8 port)
{ {
struct ahci_ioports *pp = &(probe_ent->port[port]); struct ahci_ioports *pp = &(probe_ent->port[port]);
volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio; volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
u32 cmd_fis_len = 5; /* five dwords */ u32 cmd_fis_len = 5; /* five dwords */
@ -372,7 +365,6 @@ static void ahci_set_feature(u8 port)
static int ahci_port_start(u8 port) static int ahci_port_start(u8 port)
{ {
struct ahci_ioports *pp = &(probe_ent->port[port]); struct ahci_ioports *pp = &(probe_ent->port[port]);
volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio; volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
u32 port_status; u32 port_status;
@ -394,22 +386,22 @@ static int ahci_port_start(u8 port)
} }
mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */ mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ); memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
/* /*
* First item in chunk of DMA memory: 32-slot command table, * First item in chunk of DMA memory: 32-slot command table,
* 32 bytes each in size * 32 bytes each in size
*/ */
pp->cmd_slot = (struct ahci_cmd_hdr *)mem; pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
debug("cmd_slot = 0x%x\n", pp->cmd_slot); debug("cmd_slot = 0x%x\n", pp->cmd_slot);
mem += (AHCI_CMD_SLOT_SZ + 224); mem += (AHCI_CMD_SLOT_SZ + 224);
/* /*
* Second item: Received-FIS area * Second item: Received-FIS area
*/ */
pp->rx_fis = mem; pp->rx_fis = mem;
mem += AHCI_RX_FIS_SZ; mem += AHCI_RX_FIS_SZ;
/* /*
* Third item: data area for storing a single command * Third item: data area for storing a single command
* and its scatter-gather table * and its scatter-gather table
@ -434,7 +426,8 @@ static int ahci_port_start(u8 port)
} }
static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf, int buf_len) static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
int buf_len)
{ {
struct ahci_ioports *pp = &(probe_ent->port[port]); struct ahci_ioports *pp = &(probe_ent->port[port]);
@ -503,6 +496,7 @@ static void dump_ataid(hd_driveid_t *ataid)
debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config); debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
} }
/* /*
* SCSI INQUIRY command operation. * SCSI INQUIRY command operation.
*/ */
@ -577,7 +571,8 @@ static int ata_scsiop_read10(ccb *pccb)
* *
* WARNING: one or two older ATA drives treat 0 as 0... * WARNING: one or two older ATA drives treat 0 as 0...
*/ */
if(!len) return 0; if (!len)
return 0;
memset(fis, 0, 20); memset(fis, 0, 20);
/* Construct the FIS */ /* Construct the FIS */
@ -641,6 +636,7 @@ static int ata_scsiop_test_unit_ready(ccb *pccb)
return (ataid[pccb->target]) ? 0 : -EPERM; return (ataid[pccb->target]) ? 0 : -EPERM;
} }
int scsi_exec(ccb *pccb) int scsi_exec(ccb *pccb)
{ {
int ret; int ret;